pinctrl: intel: Define maximum pad number in the group
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Mon, 19 Dec 2022 12:32:40 +0000 (14:32 +0200)
committerAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Wed, 28 Dec 2022 12:20:19 +0000 (14:20 +0200)
Instead of using hard coded magic number here and there,
define maximum pad number in the group in newly added
INTEL_PINCTRL_MAX_GPP_SIZE.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
drivers/pinctrl/intel/pinctrl-intel.c
drivers/pinctrl/intel/pinctrl-intel.h

index 038a572..1e6d49b 100644 (file)
@@ -1406,7 +1406,7 @@ static int intel_pinctrl_add_padgroups_by_gpps(struct intel_pinctrl *pctrl,
        for (i = 0; i < ngpps; i++) {
                gpps[i] = community->gpps[i];
 
-               if (gpps[i].size > 32)
+               if (gpps[i].size > INTEL_PINCTRL_MAX_GPP_SIZE)
                        return -EINVAL;
 
                /* Special treatment for GPIO base */
@@ -1424,7 +1424,7 @@ static int intel_pinctrl_add_padgroups_by_gpps(struct intel_pinctrl *pctrl,
                }
 
                gpps[i].padown_num = padown_num;
-               padown_num += DIV_ROUND_UP(gpps[i].size * 4, 32);
+               padown_num += DIV_ROUND_UP(gpps[i].size * 4, INTEL_PINCTRL_MAX_GPP_SIZE);
        }
 
        community->gpps = gpps;
@@ -1440,7 +1440,7 @@ static int intel_pinctrl_add_padgroups_by_size(struct intel_pinctrl *pctrl,
        unsigned int padown_num = 0;
        size_t i, ngpps = DIV_ROUND_UP(npins, community->gpp_size);
 
-       if (community->gpp_size > 32)
+       if (community->gpp_size > INTEL_PINCTRL_MAX_GPP_SIZE)
                return -EINVAL;
 
        gpps = devm_kcalloc(pctrl->dev, ngpps, sizeof(*gpps), GFP_KERNEL);
index 981c1f5..3b0e2d3 100644 (file)
@@ -46,11 +46,13 @@ struct intel_function {
        size_t ngroups;
 };
 
+#define INTEL_PINCTRL_MAX_GPP_SIZE     32
+
 /**
  * struct intel_padgroup - Hardware pad group information
  * @reg_num: GPI_IS register number
  * @base: Starting pin of this group
- * @size: Size of this group (maximum is 32).
+ * @size: Size of this group (maximum is %INTEL_PINCTRL_MAX_GPP_SIZE).
  * @gpio_base: Starting GPIO base of this group
  * @padown_num: PAD_OWN register number (assigned by the core driver)
  *