/// debugging downstream codegen failures exposed by regalloc.
virtual bool mayOverrideLocalAssignment() const { return true; }
+ /// Allow the target to override the cost of using a callee-saved register for
+ /// the first time. Default value of 0 means we will use a callee-saved
+ /// register if it is available.
+ virtual unsigned getCSRFirstUseCost() const { return 0; }
+
/// requiresRegisterScavenging - returns true if the target requires (and can
/// make use of) the register scavenger.
virtual bool requiresRegisterScavenging(const MachineFunction &MF) const {
unsigned PhysReg,
unsigned &CostPerUseLimit,
SmallVectorImpl<unsigned> &NewVRegs) {
- BlockFrequency CSRCost(CSRFirstTimeCost);
+ // We use the larger one out of the command-line option and the value report
+ // by TRI.
+ BlockFrequency CSRCost(std::max((unsigned)CSRFirstTimeCost,
+ TRI->getCSRFirstUseCost()));
if (getStage(VirtReg) == RS_Spill && VirtReg.isSpillable()) {
// We choose spill over using the CSR for the first time if the spill cost
// is lower than CSRCost.
// When NewVRegs is not empty, we may have made decisions such as evicting
// a virtual register, go with the earlier decisions and use the physical
// register.
- if (CSRFirstTimeCost > 0 && CSRFirstUse && NewVRegs.empty()) {
+ if ((CSRFirstTimeCost || TRI->getCSRFirstUseCost()) &&
+ CSRFirstUse && NewVRegs.empty()) {
unsigned CSRReg = tryAssignCSRFirstTime(VirtReg, Order, PhysReg,
CostPerUseLimit, NewVRegs);
if (CSRReg || !NewVRegs.empty())