drm/amdgpu: Properly allocate VM invalidate eng v2

commit c5066129af4436ab0da8eefe4289774a5409706d upstream.

v1: Properly allocate TLB invalidation engine to avoid conflict.
v2: Added comments to codes

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index d04d0b1..6dc0f6e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -395,7 +395,16 @@ static int gmc_v9_0_early_init(void *handle)
 static int gmc_v9_0_late_init(void *handle)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-       unsigned vm_inv_eng[AMDGPU_MAX_VMHUBS] = { 3, 3 };
+       /*
+        * The latest engine allocation on gfx9 is:
+        * Engine 0, 1: idle
+        * Engine 2, 3: firmware
+        * Engine 4~13: amdgpu ring, subject to change when ring number changes
+        * Engine 14~15: idle
+        * Engine 16: kfd tlb invalidation
+        * Engine 17: Gart flushes
+        */
+       unsigned vm_inv_eng[AMDGPU_MAX_VMHUBS] = { 4, 4 };
        unsigned i;
 
        for(i = 0; i < adev->num_rings; ++i) {
@@ -408,9 +417,9 @@ static int gmc_v9_0_late_init(void *handle)
                         ring->funcs->vmhub);
        }
 
-       /* Engine 17 is used for GART flushes */
+       /* Engine 16 is used for KFD and 17 for GART flushes */
        for(i = 0; i < AMDGPU_MAX_VMHUBS; ++i)
-               BUG_ON(vm_inv_eng[i] > 17);
+               BUG_ON(vm_inv_eng[i] > 16);
 
        return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0);
 }