usb: dwc3: pci: Add support for Intel Alder Lake
authorShruthi Sanil <shruthi.sanil@intel.com>
Tue, 8 Mar 2022 17:08:48 +0000 (22:38 +0530)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 15 Mar 2022 14:45:03 +0000 (15:45 +0100)
Add the PCI device ID and update the dwc3_pci_id_table
for Intel Alder Lake SoC.

The DWC3 controllor in the CPU block handles the USB3 traffic
and the device ID is common across the Alder Lake platforms.

Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Shruthi Sanil <shruthi.sanil@intel.com>
Link: https://lore.kernel.org/r/20220308170848.30722-1-shruthi.sanil@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/usb/dwc3/dwc3-pci.c

index 2e02199..33f657d 100644 (file)
@@ -40,6 +40,7 @@
 #define PCI_DEVICE_ID_INTEL_TGPLP              0xa0ee
 #define PCI_DEVICE_ID_INTEL_TGPH               0x43ee
 #define PCI_DEVICE_ID_INTEL_JSP                        0x4dee
+#define PCI_DEVICE_ID_INTEL_ADL                        0x465e
 #define PCI_DEVICE_ID_INTEL_ADLP               0x51ee
 #define PCI_DEVICE_ID_INTEL_ADLM               0x54ee
 #define PCI_DEVICE_ID_INTEL_ADLS               0x7ae1
@@ -440,6 +441,9 @@ static const struct pci_device_id dwc3_pci_id_table[] = {
        { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_JSP),
          (kernel_ulong_t) &dwc3_pci_intel_swnode, },
 
+       { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ADL),
+         (kernel_ulong_t) &dwc3_pci_intel_swnode, },
+
        { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ADLP),
          (kernel_ulong_t) &dwc3_pci_intel_swnode, },