audio: SM1/TM2: bringup EQ/DRC module [1/1]
authorZhe Wang <Zhe.Wang@amlogic.com>
Thu, 6 Jun 2019 12:22:32 +0000 (20:22 +0800)
committerNick Xie <nick@khadas.com>
Mon, 5 Aug 2019 06:45:09 +0000 (14:45 +0800)
PD#SWPL-7606

Problem:
EQ/DRC module is out of work

Solution:
bringup EQ/DRC module

Verify:
verified on ac200

Change-Id: Ibd9b1e65aaed2ecd5f3086e4325d6b92fe34b040
Signed-off-by: Zhe Wang <Zhe.Wang@amlogic.com>
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>
16 files changed:
arch/arm/boot/dts/amlogic/sm1_s905d3_ac200.dts
arch/arm/boot/dts/amlogic/sm1_s905d3_ac202.dts
arch/arm/boot/dts/amlogic/sm1_s905d3_ac202_1g.dts
arch/arm/boot/dts/amlogic/sm1_s905d3_skt.dts
arch/arm/boot/dts/amlogic/sm1_s905x3_ac213.dts
arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200.dts
arch/arm64/boot/dts/amlogic/sm1_s905d3_ac202.dts
arch/arm64/boot/dts/amlogic/sm1_s905d3_ac202_1g.dts
arch/arm64/boot/dts/amlogic/sm1_s905d3_skt.dts
arch/arm64/boot/dts/amlogic/sm1_s905x3_ac213.dts
sound/soc/amlogic/auge/ddr_mngr.c
sound/soc/amlogic/auge/effects_hw_v2.c
sound/soc/amlogic/auge/effects_hw_v2.h
sound/soc/amlogic/auge/effects_v2.c
sound/soc/amlogic/auge/effects_v2.h
sound/soc/amlogic/auge/regs.h

index b1fb7d6..4491eaa 100644 (file)
 
                status = "disabled";
        };
+
+       aed:effect {
+               compatible = "amlogic, snd-effect-v3";
+               #sound-dai-cells = <0>;
+
+               clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
+                       &clkc CLKID_FCLK_DIV5
+                       &clkaudio CLKID_AUDIO_EQDRC>;
+               clock-names = "gate", "srcpll", "eqdrc";
+
+               /*
+                * 0:tdmout_a
+                * 1:tdmout_b
+                * 2:tdmout_c
+                * 3:spdifout
+                * 4:spdifout_b
+                */
+               eqdrc_module = <1>;
+               /* max 0xf, each bit for one lane, usually one lane */
+               lane_mask = <0x1>;
+               /* max 0xff, each bit for one channel */
+               channel_mask = <0x3>;
+
+               status = "okay";
+       };
 }; /* end of audiobus */
 
 &pinctrl_periphs {
index fb690a9..5b1af05 100644 (file)
 
                status = "disabled";
        };
+       aed:effect {
+               compatible = "amlogic, snd-effect-v3";
+               #sound-dai-cells = <0>;
+               clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
+                       &clkc CLKID_FCLK_DIV5
+                       &clkaudio CLKID_AUDIO_EQDRC>;
+               clock-names = "gate", "srcpll", "eqdrc";
+               /*
+                * 0:tdmout_a
+                * 1:tdmout_b
+                * 2:tdmout_c
+                * 3:spdifout
+                * 4:spdifout_b
+                */
+               eqdrc_module = <1>;
+               /* max 0xf, each bit for one lane, usually one lane */
+               lane_mask = <0x1>;
+               /* max 0xff, each bit for one channel */
+               channel_mask = <0x3>;
+               status = "okay";
+       };
 }; /* end of audiobus */
 
 &pinctrl_periphs {
index 3de5144..270a211 100644 (file)
 
                status = "disabled";
        };
+       aed:effect {
+               compatible = "amlogic, snd-effect-v3";
+               #sound-dai-cells = <0>;
+               clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
+                       &clkc CLKID_FCLK_DIV5
+                       &clkaudio CLKID_AUDIO_EQDRC>;
+               clock-names = "gate", "srcpll", "eqdrc";
+               /*
+                * 0:tdmout_a
+                * 1:tdmout_b
+                * 2:tdmout_c
+                * 3:spdifout
+                * 4:spdifout_b
+                */
+               eqdrc_module = <1>;
+               /* max 0xf, each bit for one lane, usually one lane */
+               lane_mask = <0x1>;
+               /* max 0xff, each bit for one channel */
+               channel_mask = <0x3>;
+               status = "okay";
+       };
 }; /* end of audiobus */
 
 &pinctrl_periphs {
index 2bd51e0..ca580ff 100644 (file)
 
                status = "disabled";
        };
+       aed:effect {
+               compatible = "amlogic, snd-effect-v3";
+               #sound-dai-cells = <0>;
+               clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
+                       &clkc CLKID_FCLK_DIV5
+                       &clkaudio CLKID_AUDIO_EQDRC>;
+               clock-names = "gate", "srcpll", "eqdrc";
+               /*
+                * 0:tdmout_a
+                * 1:tdmout_b
+                * 2:tdmout_c
+                * 3:spdifout
+                * 4:spdifout_b
+                */
+               eqdrc_module = <1>;
+               /* max 0xf, each bit for one lane, usually one lane */
+               lane_mask = <0x1>;
+               /* max 0xff, each bit for one channel */
+               channel_mask = <0x3>;
+               status = "okay";
+       };
 }; /* end of audiobus */
 
 &pinctrl_periphs {
index e3b8caf..d18bf51 100644 (file)
 
                status = "disabled";
        };
+       aed:effect {
+               compatible = "amlogic, snd-effect-v3";
+               #sound-dai-cells = <0>;
+               clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
+                       &clkc CLKID_FCLK_DIV5
+                       &clkaudio CLKID_AUDIO_EQDRC>;
+               clock-names = "gate", "srcpll", "eqdrc";
+               /*
+                * 0:tdmout_a
+                * 1:tdmout_b
+                * 2:tdmout_c
+                * 3:spdifout
+                * 4:spdifout_b
+                */
+               eqdrc_module = <1>;
+               /* max 0xf, each bit for one lane, usually one lane */
+               lane_mask = <0x1>;
+               /* max 0xff, each bit for one channel */
+               channel_mask = <0x3>;
+               status = "okay";
+       };
 }; /* end of audiobus */
 
 &pinctrl_periphs {
index b78d698..09a9a2f 100644 (file)
 
                status = "disabled";
        };
+       aed:effect {
+               compatible = "amlogic, snd-effect-v3";
+               #sound-dai-cells = <0>;
+               clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
+                       &clkc CLKID_FCLK_DIV5
+                       &clkaudio CLKID_AUDIO_EQDRC>;
+               clock-names = "gate", "srcpll", "eqdrc";
+               /*
+                * 0:tdmout_a
+                * 1:tdmout_b
+                * 2:tdmout_c
+                * 3:spdifout
+                * 4:spdifout_b
+                */
+               eqdrc_module = <1>;
+               /* max 0xf, each bit for one lane, usually one lane */
+               lane_mask = <0x1>;
+               /* max 0xff, each bit for one channel */
+               channel_mask = <0x3>;
+               status = "okay";
+       };
 }; /* end of audiobus */
 
 &pinctrl_periphs {
index d393610..a32b2b7 100644 (file)
 
                status = "disabled";
        };
+       aed:effect {
+               compatible = "amlogic, snd-effect-v3";
+               #sound-dai-cells = <0>;
+               clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
+                       &clkc CLKID_FCLK_DIV5
+                       &clkaudio CLKID_AUDIO_EQDRC>;
+               clock-names = "gate", "srcpll", "eqdrc";
+               /*
+                * 0:tdmout_a
+                * 1:tdmout_b
+                * 2:tdmout_c
+                * 3:spdifout
+                * 4:spdifout_b
+                */
+               eqdrc_module = <1>;
+               /* max 0xf, each bit for one lane, usually one lane */
+               lane_mask = <0x1>;
+               /* max 0xff, each bit for one channel */
+               channel_mask = <0x3>;
+               status = "okay";
+       };
 }; /* end of audiobus */
 
 &pinctrl_periphs {
index 7ad6393..b1f88fd 100644 (file)
 
                status = "disabled";
        };
+       aed:effect {
+               compatible = "amlogic, snd-effect-v3";
+               #sound-dai-cells = <0>;
+               clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
+                       &clkc CLKID_FCLK_DIV5
+                       &clkaudio CLKID_AUDIO_EQDRC>;
+               clock-names = "gate", "srcpll", "eqdrc";
+               /*
+                * 0:tdmout_a
+                * 1:tdmout_b
+                * 2:tdmout_c
+                * 3:spdifout
+                * 4:spdifout_b
+                */
+               eqdrc_module = <1>;
+               /* max 0xf, each bit for one lane, usually one lane */
+               lane_mask = <0x1>;
+               /* max 0xff, each bit for one channel */
+               channel_mask = <0x3>;
+               status = "okay";
+       };
 }; /* end of audiobus */
 
 &pinctrl_periphs {
index 1d84267..aa9b7bf 100644 (file)
 
                status = "disabled";
        };
+       aed:effect {
+               compatible = "amlogic, snd-effect-v3";
+               #sound-dai-cells = <0>;
+               clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
+                       &clkc CLKID_FCLK_DIV5
+                       &clkaudio CLKID_AUDIO_EQDRC>;
+               clock-names = "gate", "srcpll", "eqdrc";
+               /*
+                * 0:tdmout_a
+                * 1:tdmout_b
+                * 2:tdmout_c
+                * 3:spdifout
+                * 4:spdifout_b
+                */
+               eqdrc_module = <1>;
+               /* max 0xf, each bit for one lane, usually one lane */
+               lane_mask = <0x1>;
+               /* max 0xff, each bit for one channel */
+               channel_mask = <0x3>;
+               status = "okay";
+       };
 }; /* end of audiobus */
 
 &pinctrl_periphs {
index 14ae626..a0fa77f 100644 (file)
 
                status = "disabled";
        };
+       aed:effect {
+               compatible = "amlogic, snd-effect-v3";
+               #sound-dai-cells = <0>;
+               clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
+                       &clkc CLKID_FCLK_DIV5
+                       &clkaudio CLKID_AUDIO_EQDRC>;
+               clock-names = "gate", "srcpll", "eqdrc";
+               /*
+                * 0:tdmout_a
+                * 1:tdmout_b
+                * 2:tdmout_c
+                * 3:spdifout
+                * 4:spdifout_b
+                */
+               eqdrc_module = <1>;
+               /* max 0xf, each bit for one lane, usually one lane */
+               lane_mask = <0x1>;
+               /* max 0xff, each bit for one channel */
+               channel_mask = <0x3>;
+               status = "okay";
+       };
 }; /* end of audiobus */
 
 &pinctrl_periphs {
index ecb7293..67c6cec 100644 (file)
@@ -1322,8 +1322,9 @@ void aml_frddr_set_format(struct frddr *fr,
 static void aml_aed_enable(struct frddr_attach *p_attach_aed, bool enable)
 {
        struct frddr *fr = fetch_frddr_by_src(p_attach_aed->attach_module);
+       int aed_version = check_aed_version();
 
-       if (check_aed_v2()) {
+       if (aed_version == VERSION2 || aed_version == VERSION3) {
                struct aml_audio_controller *actrl = fr->actrl;
                unsigned int reg_base = fr->reg_base;
                unsigned int reg;
@@ -1332,16 +1333,31 @@ static void aml_aed_enable(struct frddr_attach *p_attach_aed, bool enable)
                if (enable) {
                        aml_audiobus_update_bits(actrl,
                                reg, 0x1 << 3, enable << 3);
-                       aed_set_ctrl(enable, 0, p_attach_aed->attach_module);
-                       aed_set_format(fr->msb, fr->type, fr->fifo_id);
+                       if (aed_version == VERSION3) {
+                               aed_set_ctrl(enable, 0,
+                                       p_attach_aed->attach_module, 1);
+                               aed_set_format(fr->msb,
+                                       fr->type, fr->fifo_id, 1);
+                       } else {
+                               aed_set_ctrl(enable, 0,
+                                       p_attach_aed->attach_module, 0);
+                               aed_set_format(fr->msb,
+                                       fr->type, fr->fifo_id, 0);
+                       }
                        aed_enable(enable);
                } else {
                        aed_enable(enable);
-                       aed_set_ctrl(enable, 0, p_attach_aed->attach_module);
+                       if (aed_version == VERSION3) {
+                               aed_set_ctrl(enable, 0,
+                                       p_attach_aed->attach_module, 1);
+                       } else {
+                               aed_set_ctrl(enable, 0,
+                                       p_attach_aed->attach_module, 0);
+                       }
                        aml_audiobus_update_bits(actrl,
                                reg, 0x1 << 3, enable << 3);
                }
-       } else {
+       } else if (aed_version == VERSION1) {
                if (enable) {
                        /* frddr type and bit depth for AED */
                        aml_aed_format_set(fr->dest);
index fcf3ce2..43fdbe5 100644 (file)
@@ -235,7 +235,35 @@ void aed_set_lane_and_channels(int lane_mask, int ch_mask)
                0xff << 12, (ch_num - 1) << 12);
 }
 
-void aed_set_ctrl(bool enable, int sel, enum frddr_dest module)
+/* max 16ch, 8 lane*/
+void aed_set_lane_and_channels_v3(int lane_mask, int ch_mask)
+{
+       int ch_num = 0, lane_num = 0, i = 0;
+       int val_ch = ch_mask & 0xffff;
+       int val_lane = lane_mask & 0xff;
+
+       for (i = 0; i < 16; i++) {
+               if ((val_ch & 0x1) == 0x1)
+                       ch_num++;
+               if ((val_lane & 0x1) == 0x1)
+                       lane_num = i;
+               val_ch >>= 1;
+               val_lane >>= 1;
+       }
+
+       eqdrc_update_bits(AED_TOP_CTL1,
+               0xf << 20 | 0xf << 16 | 0x1 << 5 | 0x1 << 4 | 0xf,
+               (lane_num * 2 + 1) << 20 | (lane_num * 2) << 16 |
+               0x1 << 5 | 0x1 << 4 | (ch_num - 1));
+
+       eqdrc_update_bits(AED_TOP_CTL2,
+               0xff << 12, (ch_num - 1) << 12);
+
+       /*pr_info("ch_num = %d, lane_num = %d", ch_num, lane_num);*/
+}
+
+
+void aed_set_ctrl(bool enable, int sel, enum frddr_dest module, int offset)
 {
        int mask = 0, val = 0;
 
@@ -258,7 +286,8 @@ void aed_set_ctrl(bool enable, int sel, enum frddr_dest module)
                return;
        }
 
-       eqdrc_update_bits(AED_TOP_REQ_CTL, mask, val);
+       /*AED_TOP_REQ_CTL or AED_TOP_CTL2*/
+       eqdrc_update_bits((AED_TOP_REQ_CTL + offset), mask, val);
 
        /* Effect Module */
        if (module <= TDMOUT_C && module >= TDMOUT_A) {
@@ -271,11 +300,12 @@ void aed_set_ctrl(bool enable, int sel, enum frddr_dest module)
 
 }
 
-void aed_set_format(int msb, enum ddr_types frddr_type, enum ddr_num source)
+void aed_set_format(int msb, enum ddr_types frddr_type,
+                               enum ddr_num source, int offset)
 {
        eqdrc_update_bits(AED_TOP_CTL,
                0x7 << 11 | 0x1f << 6 | 0x3 << 4,
-               frddr_type << 11 | msb << 6 | source << 4);
+               frddr_type << 11 | msb << 6 | source << (4 - offset));
 }
 
 void aed_enable(bool enable)
index b7e65c5..c506a43 100644 (file)
@@ -33,8 +33,11 @@ void aed_set_multiband_drc_enable(bool enable);
 void aed_set_volume(unsigned int master_volume,
                unsigned int Lch_vol, unsigned int Rch_vol);
 void aed_set_lane_and_channels(int lane_mask, int ch_mask);
-void aed_set_ctrl(bool enable, int sel, enum frddr_dest module);
-void aed_set_format(int msb, enum ddr_types frddr_type, enum ddr_num source);
+void aed_set_lane_and_channels_v3(int lane_mask, int ch_mask);
+void aed_set_ctrl(bool enable, int sel,
+               enum frddr_dest module, int offset);
+void aed_set_format(int msb, enum ddr_types frddr_type,
+               enum ddr_num source, int offset);
 void aed_enable(bool enable);
 void aed_set_mixer_params(void);
 void aed_eq_taps(unsigned int eq1_taps);
index d03f846..b7ca4bc 100644 (file)
@@ -49,8 +49,9 @@ enum {
 struct effect_chipinfo {
        /* v1 is for G12X(g12a, g12b)
         * v2 is for tl1
+        * v3 is for sm1/tm2
         */
-       bool v2;
+       int version;
        bool reserved_frddr;
 };
 
@@ -95,17 +96,14 @@ int get_aed_dst(void)
                return p_effect->effect_module;
 }
 
-bool check_aed_v2(void)
+int check_aed_version(void)
 {
        struct audioeffect *p_effect = get_audioeffects();
 
-       if (!p_effect)
-               return false;
-
-       if (p_effect->chipinfo && p_effect->chipinfo->v2)
-               return true;
+       if ((!p_effect) || (!p_effect->chipinfo))
+               return -1;
 
-       return false;
+       return p_effect->chipinfo->version;
 }
 
 static int eqdrc_clk_set(struct audioeffect *p_effect)
@@ -531,7 +529,12 @@ int card_add_effect_v2_kcontrols(struct snd_soc_card *card)
 }
 
 static struct effect_chipinfo tl1_effect_chipinfo = {
-       .v2 = true,
+       .version = VERSION2,
+       .reserved_frddr = true,
+};
+
+static struct effect_chipinfo sm1_effect_chipinfo = {
+       .version = VERSION3,
        .reserved_frddr = true,
 };
 
@@ -544,8 +547,8 @@ static const struct of_device_id effect_device_id[] = {
                .data       = &tl1_effect_chipinfo,
        },
        {
-               .compatible = "amlogic, tl1-effect",
-               .data       = &tl1_effect_chipinfo,
+               .compatible = "amlogic, snd-effect-v3",
+               .data       = &sm1_effect_chipinfo,
        },
        {}
 };
@@ -650,8 +653,16 @@ static int effect_platform_probe(struct platform_device *pdev)
        p_effect->ch_mask          = channel_mask;
        p_effect->effect_module    = eqdrc_module;
 
+       p_effect->dev = dev;
+       s_effect = p_effect;
+       dev_set_drvdata(&pdev->dev, p_effect);
+
        /*set eq/drc module lane & channels*/
-       aed_set_lane_and_channels(lane_mask, channel_mask);
+       if (check_aed_version() == VERSION3)
+               aed_set_lane_and_channels_v3(lane_mask, channel_mask);
+       else
+               aed_set_lane_and_channels(lane_mask, channel_mask);
+
        /*set master & channel volume gain to 0dB*/
        aed_set_volume(0xc0, 0x30, 0x30);
        /*set default mixer gain*/
@@ -669,10 +680,6 @@ static int effect_platform_probe(struct platform_device *pdev)
        /*set EQ/DRC module enable*/
        aml_set_aed(1, p_effect->effect_module);
 
-       p_effect->dev = dev;
-       s_effect = p_effect;
-       dev_set_drvdata(&pdev->dev, p_effect);
-
        if (p_effect->chipinfo &&
                p_effect->chipinfo->reserved_frddr) {
                aml_aed_set_frddr_reserved();
index 30576b7..f26466a 100644 (file)
 #ifndef __EFFECTS_V2_H__
 #define __EFFECTS_V2_H__
 
-extern bool check_aed_v2(void);
+enum {
+       VERSION1 = 0,
+       VERSION2,
+       VERSION3
+};
+
+extern int check_aed_version(void);
 extern int card_add_effect_v2_kcontrols(struct snd_soc_card *card);
 extern int get_aed_dst(void);
 
index cbecb17..7a53e59 100644 (file)
@@ -924,6 +924,9 @@ struct register_table {
 #define AED_TOP_CTL                        0x83
 #define AED_TOP_REQ_CTL                    0x84
 
+#define AED_TOP_CTL0                       0x83
+#define AED_TOP_CTL1                       0x84
+#define AED_TOP_CTL2                       0x85
 
 /*
  * VAD, Voice activity detection