soc/fsl-layerscape: Update SVR number for LS2081A and LS2041A

Update SVR as per the SOC document.
 -LS2081A: 0x870919 -> 0x870918
 -LS2041A: 0x870915 -> 0x870914

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index 497afe7..aeb1273 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -65,8 +65,8 @@ struct cpu_type {
 #define SVR_LS2084A            0x870910
 #define SVR_LS2048A            0x870920
 #define SVR_LS2044A            0x870930
-#define SVR_LS2081A            0x870919
-#define SVR_LS2041A            0x870915
+#define SVR_LS2081A            0x870918
+#define SVR_LS2041A            0x870914
 
 #define SVR_DEV_LS2080A                0x8701
 

diff --git a/drivers/pci/pcie_layerscape.h b/drivers/pci/pcie_layerscape.h
index 308b073..782e3ab 100644 (file)
--- a/drivers/pci/pcie_layerscape.h
+++ b/drivers/pci/pcie_layerscape.h
@@ -118,8 +118,8 @@
 #define SVR_LS2084A            0x870910
 #define SVR_LS2048A            0x870920
 #define SVR_LS2044A            0x870930
-#define SVR_LS2081A            0x870919
-#define SVR_LS2041A            0x870915
+#define SVR_LS2081A            0x870918
+#define SVR_LS2041A            0x870914
 
 /* LS1021a PCIE space */
 #define LS1021_PCIE_SPACE_OFFSET       0x4000000000ULL