usb: dwc3: core: add support for realtek SoCs custom's global register start address
authorStanley Chang <stanley_chang@realtek.com>
Fri, 5 May 2023 02:50:54 +0000 (10:50 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 13 May 2023 08:33:38 +0000 (17:33 +0900)
The Realtek RTD SoCs were designed with the global register address
offset at 0x8100. The default address offset is constant at
DWC3_GLOBALS_REGS_START (0xc100). Therefore, add a check if the
compatible name of the parent is realtek,rtd-dwc3, then global
register start address will remap to 0x8100.

Signed-off-by: Stanley Chang <stanley_chang@realtek.com>
Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
Link: https://lore.kernel.org/r/20230505025104.18321-1-stanley_chang@realtek.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/usb/dwc3/core.c
drivers/usb/dwc3/core.h

index 0beaab9..278cd1c 100644 (file)
@@ -1800,6 +1800,17 @@ static int dwc3_probe(struct platform_device *pdev)
        dwc_res = *res;
        dwc_res.start += DWC3_GLOBALS_REGS_START;
 
+       if (dev->of_node) {
+               struct device_node *parent = of_get_parent(dev->of_node);
+
+               if (of_device_is_compatible(parent, "realtek,rtd-dwc3")) {
+                       dwc_res.start -= DWC3_GLOBALS_REGS_START;
+                       dwc_res.start += DWC3_RTK_RTD_GLOBALS_REGS_START;
+               }
+
+               of_node_put(parent);
+       }
+
        regs = devm_ioremap_resource(dev, &dwc_res);
        if (IS_ERR(regs))
                return PTR_ERR(regs);
index d56457c..1968638 100644 (file)
@@ -84,6 +84,8 @@
 #define DWC3_OTG_REGS_START            0xcc00
 #define DWC3_OTG_REGS_END              0xccff
 
+#define DWC3_RTK_RTD_GLOBALS_REGS_START        0x8100
+
 /* Global Registers */
 #define DWC3_GSBUSCFG0         0xc100
 #define DWC3_GSBUSCFG1         0xc104