spi: spi-s3c64xx: Add support for Exynos5433 ISP SPI controllers
authorSylwester Nawrocki <s.nawrocki@samsung.com>
Thu, 12 Apr 2018 15:02:00 +0000 (17:02 +0200)
committerJunghoon Kim <jhoon20.kim@samsung.com>
Thu, 14 Feb 2019 05:57:00 +0000 (14:57 +0900)
This patch adds support for the Exynos5433 ISP SPI devices. An additional
code performing the SPI controller's software reset is added to ensure
proper operation as the controller is also used by the FIMC-IS firmware.

Change-Id: I4c4e8d7b032e1068bb77411a5f19d8d3f17df3eb
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
drivers/spi/spi-s3c64xx.c

index 89584f5..66618e1 100644 (file)
 
 #include <linux/platform_data/spi-s3c64xx.h>
 
-#define MAX_SPI_PORTS          6
+#define MAX_SPI_PORTS                  7
 #define S3C64XX_SPI_QUIRK_POLL         (1 << 0)
 #define S3C64XX_SPI_QUIRK_CS_AUTO      (1 << 1)
+#define S3C64XX_SPI_QUIRK_SW_RESET     (1 << 2)
 #define AUTOSUSPEND_TIMEOUT    2000
 
 /* Registers and bit-fields */
@@ -1363,6 +1364,19 @@ static int s3c64xx_spi_runtime_resume(struct device *dev)
        ret = clk_prepare_enable(sdd->clk);
        if (ret != 0)
                goto err_disable_src_clk;
+       /*
+        *  A workaround to prevent issues in the H/W handover between this
+        *  driver and the FIMC-IS firmware.
+        */
+       if (sdd->port_conf->quirks & S3C64XX_SPI_QUIRK_SW_RESET) {
+               u32 val = readl(sdd->regs + S3C64XX_SPI_CH_CFG);
+
+               val |= S3C64XX_SPI_CH_SW_RST;
+               writel(val, sdd->regs + S3C64XX_SPI_CH_CFG);
+
+               val &= ~S3C64XX_SPI_CH_SW_RST;
+               writel(val, sdd->regs + S3C64XX_SPI_CH_CFG);
+       }
 
        s3c64xx_spi_hwinit(sdd);
 
@@ -1439,6 +1453,14 @@ static struct s3c64xx_spi_port_config exynos5433_spi_port_config = {
        .quirks         = S3C64XX_SPI_QUIRK_CS_AUTO,
 };
 
+static struct s3c64xx_spi_port_config exynos5433_isp_spi_port_config = {
+       .fifo_lvl_mask  = { 0x1ff, 0x7f, 0x7f, 0x7f, 0x7f, 0x1ff, 0x1ff },
+       .rx_lvl_offset  = 15,
+       .tx_st_done     = 25,
+       .high_speed     = true,
+       .clk_from_cmu   = true,
+       .quirks         = S3C64XX_SPI_QUIRK_POLL | S3C64XX_SPI_QUIRK_SW_RESET,
+};
 static const struct platform_device_id s3c64xx_spi_driver_ids[] = {
        {
                .name           = "s3c2443-spi",
@@ -1472,6 +1494,9 @@ static const struct of_device_id s3c64xx_spi_dt_match[] = {
        { .compatible = "samsung,exynos5433-spi",
                        .data = (void *)&exynos5433_spi_port_config,
        },
+       { .compatible = "samsung,exynos5433-isp-spi",
+                       .data = (void *)&exynos5433_isp_spi_port_config,
+       },
        { },
 };
 MODULE_DEVICE_TABLE(of, s3c64xx_spi_dt_match);