// Sort by complexity, this groups all similar expression types together.
GroupByComplexity(Ops, &LI, DT);
- Flags = StrengthenNoWrapFlags(this, scMulExpr, Ops, Flags);
-
// If there are any constants, fold them together.
unsigned Idx = 0;
if (const SCEVConstant *LHSC = dyn_cast<SCEVConstant>(Ops[0])) {
return Ops[0];
}
+ Flags = StrengthenNoWrapFlags(this, scMulExpr, Ops, Flags);
+
// Limit recursion calls depth.
if (Depth > MaxArithDepth || hasHugeExpression(Ops))
return getOrCreateMulExpr(Ops, Flags);
; sure they aren't marked as post-inc users.
;
; CHECK-LABEL: IV Users for loop %test1.loop
-; CHECK-NO-LCSSA: %sext.us = {0,+,(16777216 + (-16777216 * %sub.us))<nuw><nsw>,+,33554432}<%test1.loop> (post-inc with loop %test1.loop) in %f = ashr i32 %sext.us, 24
+; CHECK-NO-LCSSA: %sext.us = {0,+,(16777216 + (-16777216 * %sub.us)<nuw><nsw>)<nuw><nsw>,+,33554432}<%test1.loop> (post-inc with loop %test1.loop) in %f = ashr i32 %sext.us, 24
define i32 @test1(i1 %cond) {
entry:
%sub.us = select i1 %cond, i32 0, i32 0
; LAA: Memory dependences are safe{{$}}
; LAA: SCEV assumptions:
; LAA-NEXT: {(2 * (trunc i64 %N to i32)),+,-2}<%for.body> Added Flags: <nusw>
-; LAA-NEXT: {((4 * (zext i31 (trunc i64 %N to i31) to i64)) + %a),+,-4}<%for.body> Added Flags: <nusw>
+; LAA-NEXT: {((4 * (zext i31 (trunc i64 %N to i31) to i64))<nuw><nsw> + %a),+,-4}<%for.body> Added Flags: <nusw>
; The expression for %mul_ext as analyzed by SCEV is
; (zext i32 {(2 * (trunc i64 %N to i32)),+,-2}<%for.body> to i64)
; LAA: [PSE] %arrayidxA = getelementptr i16, i16* %a, i64 %mul_ext:
; LAA-NEXT: ((2 * (zext i32 {(2 * (trunc i64 %N to i32)),+,-2}<%for.body> to i64))<nuw><nsw> + %a)
-; LAA-NEXT: --> {((4 * (zext i31 (trunc i64 %N to i31) to i64)) + %a),+,-4}<%for.body>
+; LAA-NEXT: --> {((4 * (zext i31 (trunc i64 %N to i31) to i64))<nuw><nsw> + %a),+,-4}<%for.body>
; LV-LABEL: f2
; LV-LABEL: for.body.lver.check
%sub = sub i32 %a, %mul
%zext = zext i32 %sub to i64
; CHECK: %zext
-; CHECK-NEXT: --> ((-56 * ((zext i32 %t to i64) /u 112)) + ((zext i32 %t to i64) /u 2))
+; CHECK-NEXT: --> ((-56 * ((zext i32 %t to i64) /u 112))<nsw> + ((zext i32 %t to i64) /u 2))
ret i64 %zext
}
; CHECK-V8M-NEXT: [[UMIN:%.*]] = select i1 [[TMP1]], i32 [[SIZE]], i32 31
; CHECK-V8M-NEXT: [[TMP2:%.*]] = sub i32 [[TMP0]], [[UMIN]]
; CHECK-V8M-NEXT: [[TMP3:%.*]] = lshr i32 [[TMP2]], 5
-; CHECK-V8M-NEXT: [[TMP4:%.*]] = shl i32 [[TMP3]], 5
+; CHECK-V8M-NEXT: [[TMP4:%.*]] = shl nuw i32 [[TMP3]], 5
; CHECK-V8M-NEXT: br label [[WHILE_COND:%.*]]
; CHECK-V8M: while.cond:
; CHECK-V8M-NEXT: br i1 false, label [[WHILE_COND]], label [[WHILE_END:%.*]]
; CHECK-V8A-NEXT: [[UMIN:%.*]] = select i1 [[TMP1]], i32 [[SIZE]], i32 31
; CHECK-V8A-NEXT: [[TMP2:%.*]] = sub i32 [[TMP0]], [[UMIN]]
; CHECK-V8A-NEXT: [[TMP3:%.*]] = lshr i32 [[TMP2]], 5
-; CHECK-V8A-NEXT: [[TMP4:%.*]] = shl i32 [[TMP3]], 5
+; CHECK-V8A-NEXT: [[TMP4:%.*]] = shl nuw i32 [[TMP3]], 5
; CHECK-V8A-NEXT: br label [[WHILE_COND:%.*]]
; CHECK-V8A: while.cond:
; CHECK-V8A-NEXT: br i1 false, label [[WHILE_COND]], label [[WHILE_END:%.*]]
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[SIZE:%.*]], 31
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[SIZE]], 31
-; CHECK-NEXT: [[UMAX:%.*]] = select i1 [[TMP1]], i32 [[SIZE]], i32 31
-; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[TMP0]], [[UMAX]]
+; CHECK-NEXT: [[UMIN:%.*]] = select i1 [[TMP1]], i32 [[SIZE]], i32 31
+; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[TMP0]], [[UMIN]]
; CHECK-NEXT: [[TMP3:%.*]] = lshr i32 [[TMP2]], 5
-; CHECK-NEXT: [[TMP4:%.*]] = shl i32 [[TMP3]], 5
+; CHECK-NEXT: [[TMP4:%.*]] = shl nuw i32 [[TMP3]], 5
; CHECK-NEXT: br label [[WHILE_COND:%.*]]
; CHECK: while.cond:
; CHECK-NEXT: [[SIZE_ADDR_0:%.*]] = phi i32 [ [[SIZE]], [[ENTRY:%.*]] ], [ [[SUB:%.*]], [[WHILE_COND]] ]