This field takes 4 bits, not 2.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8125>
<field name="CRC Row Stride" size="32" start="2:0" type="uint"/>
<field name="ZS Write Format" size="4" start="3:0" type="ZS Format"/>
<field name="ZS Block Format" size="2" start="3:4" type="Block Format"/>
- <field name="ZS Block Format v7" size="2" start="3:4" type="Block Format v7"/>
+ <field name="ZS Block Format v7" size="4" start="3:4" type="Block Format v7"/>
<field name="ZS MSAA" size="2" start="3:6" default="Single" type="MSAA"/>
<field name="ZS MSAA v7" size="2" start="3:8" default="Single" type="MSAA"/>
<field name="ZS Big Endian" size="1" start="3:8" type="bool"/>