@code{AVX512_BITALG} -- The AVX512_BITALG instruction extensions.
@item
+@code{AVX512_FP16} -- The AVX512_FP16 instruction extensions.
+
+@item
@code{AVX512_IFMA} -- The AVX512_IFMA instruction extensions.
@item
AVX512_VP2INTERSECT);
/* Determine if AVX512_BF16 is usable. */
CPU_FEATURE_SET_USABLE (cpu_features, AVX512_BF16);
+ /* Determine if AVX512_FP16 is usable. */
+ CPU_FEATURE_SET_USABLE (cpu_features, AVX512_FP16);
}
}
}
#define bit_cpu_IBT (1u << 20)
#define bit_cpu_INDEX_7_EDX_21 (1u << 21)
#define bit_cpu_AMX_BF16 (1u << 22)
-#define bit_cpu_INDEX_7_EDX_23 (1u << 23)
+#define bit_cpu_AVX512_FP16 (1u << 23)
#define bit_cpu_AMX_TILE (1u << 24)
#define bit_cpu_AMX_INT8 (1u << 25)
#define bit_cpu_IBRS_IBPB (1u << 26)
#define index_cpu_IBT COMMON_CPUID_INDEX_7
#define index_cpu_INDEX_7_EDX_21 COMMON_CPUID_INDEX_7
#define index_cpu_AMX_BF16 COMMON_CPUID_INDEX_7
-#define index_cpu_INDEX_7_EDX_23 COMMON_CPUID_INDEX_7
+#define index_cpu_AVX512_FP16 COMMON_CPUID_INDEX_7
#define index_cpu_AMX_TILE COMMON_CPUID_INDEX_7
#define index_cpu_AMX_INT8 COMMON_CPUID_INDEX_7
#define index_cpu_IBRS_IBPB COMMON_CPUID_INDEX_7
#define reg_IBT edx
#define reg_INDEX_7_EDX_21 edx
#define reg_AMX_BF16 edx
-#define reg_INDEX_7_EDX_23 edx
+#define reg_AVX512_FP16 edx
#define reg_AMX_TILE edx
#define reg_AMX_INT8 edx
#define reg_IBRS_IBPB edx
CHECK_CPU_FEATURE (PCONFIG);
CHECK_CPU_FEATURE (IBT);
CHECK_CPU_FEATURE (AMX_BF16);
+ CHECK_CPU_FEATURE (AVX512_FP16);
CHECK_CPU_FEATURE (AMX_TILE);
CHECK_CPU_FEATURE (AMX_INT8);
CHECK_CPU_FEATURE (IBRS_IBPB);
CHECK_CPU_FEATURE_USABLE (TSXLDTRK);
CHECK_CPU_FEATURE_USABLE (PCONFIG);
CHECK_CPU_FEATURE_USABLE (AMX_BF16);
+ CHECK_CPU_FEATURE_USABLE (AVX512_FP16);
CHECK_CPU_FEATURE_USABLE (AMX_TILE);
CHECK_CPU_FEATURE_USABLE (AMX_INT8);
CHECK_CPU_FEATURE_USABLE (IBRS_IBPB);