[X86] Remove SLDT64m instruction.

It doesn't really exist. The instruction always writes 16-bits of memory. Putting a REX.w on it won't change anything.

While I was touching the encoding tests to remove it, I added some other missing register form test cases.

llvm-svn: 331135

diff --git a/llvm/lib/Target/X86/X86InstrSystem.td b/llvm/lib/Target/X86/X86InstrSystem.td
index 3e9c264..190f295 100644 (file)
--- a/llvm/lib/Target/X86/X86InstrSystem.td
+++ b/llvm/lib/Target/X86/X86InstrSystem.td
@@ -382,9 +382,6 @@ def SLDT32r : I<0x00, MRM0r, (outs GR32:$dst), (ins),
 //   extension.
 def SLDT64r : RI<0x00, MRM0r, (outs GR64:$dst), (ins),
                  "sldt{q}\t$dst", []>, TB, Requires<[In64BitMode]>;
-let mayStore = 1 in
-def SLDT64m : RI<0x00, MRM0m, (outs), (ins i16mem:$dst),
-                 "sldt{q}\t$dst", []>, TB, Requires<[In64BitMode]>;
 
 def LGDT16m : I<0x01, MRM2m, (outs), (ins opaque48mem:$src),
                 "lgdt{w}\t$src", []>, TB, OpSize16, Requires<[Not64BitMode]>;

diff --git a/llvm/lib/Target/X86/X86SchedBroadwell.td b/llvm/lib/Target/X86/X86SchedBroadwell.td
index c07d68f..9ae3981 100755 (executable)
--- a/llvm/lib/Target/X86/X86SchedBroadwell.td
+++ b/llvm/lib/Target/X86/X86SchedBroadwell.td
@@ -455,7 +455,6 @@ def: InstRW<[BWWriteResGroup9], (instregex "LAHF", // TODO: This doesnt match Ag
                                            "SAHF", // TODO: This doesn't match Agner's data
                                            "SGDT64m",
                                            "SIDT64m",
-                                           "SLDT64m",
                                            "SMSW16m",
                                            "STRm",
                                            "SYSCALL")>;

diff --git a/llvm/lib/Target/X86/X86SchedHaswell.td b/llvm/lib/Target/X86/X86SchedHaswell.td
index 3066dbb..964e2b1 100644 (file)
--- a/llvm/lib/Target/X86/X86SchedHaswell.td
+++ b/llvm/lib/Target/X86/X86SchedHaswell.td
@@ -786,7 +786,6 @@ def: InstRW<[HWWriteResGroup10], (instregex "CLC",
                                             "NOOP",
                                             "SGDT64m",
                                             "SIDT64m",
-                                            "SLDT64m",
                                             "SMSW16m",
                                             "STC",
                                             "STRm",

diff --git a/llvm/lib/Target/X86/X86SchedSkylakeClient.td b/llvm/lib/Target/X86/X86SchedSkylakeClient.td
index c52d147..e6608bc 100644 (file)
--- a/llvm/lib/Target/X86/X86SchedSkylakeClient.td
+++ b/llvm/lib/Target/X86/X86SchedSkylakeClient.td
@@ -539,7 +539,6 @@ def: InstRW<[SKLWriteResGroup10], (instregex "CLC",
                                              "SAHF", // TODO: This doesn't match Agner's data
                                              "SGDT64m",
                                              "SIDT64m",
-                                             "SLDT64m",
                                              "SMSW16m",
                                              "STC",
                                              "STRm",

diff --git a/llvm/lib/Target/X86/X86SchedSkylakeServer.td b/llvm/lib/Target/X86/X86SchedSkylakeServer.td
index 22f0382..0025067 100755 (executable)
--- a/llvm/lib/Target/X86/X86SchedSkylakeServer.td
+++ b/llvm/lib/Target/X86/X86SchedSkylakeServer.td
@@ -908,7 +908,6 @@ def: InstRW<[SKXWriteResGroup10], (instregex "CLC",
                                              "SAHF", // TODO: This doesn't match Agner's data
                                              "SGDT64m",
                                              "SIDT64m",
-                                             "SLDT64m",
                                              "SMSW16m",
                                              "STC",
                                              "STRm",

diff --git a/llvm/test/MC/X86/I286-32.s b/llvm/test/MC/X86/I286-32.s
index d192de4..0d46366 100644 (file)
--- a/llvm/test/MC/X86/I286-32.s
+++ b/llvm/test/MC/X86/I286-32.s
@@ -132,6 +132,10 @@ ltrw 64(%edx,%eax)
 // CHECK: encoding: [0x0f,0x00,0x1a]         
 ltrw (%edx) 
 
+// CHECK: sldtw %ax 
+// CHECK: encoding: [0x66,0x0f,0x00,0xc0]         
+sldtw %ax 
+
 // CHECK: sldtl %eax 
 // CHECK: encoding: [0x0f,0x00,0xc0]         
 sldtl %eax 

diff --git a/llvm/test/MC/X86/I286-64.s b/llvm/test/MC/X86/I286-64.s
index cd23311..73376de 100644 (file)
--- a/llvm/test/MC/X86/I286-64.s
+++ b/llvm/test/MC/X86/I286-64.s
@@ -240,33 +240,17 @@ sidtq 64(%rdx,%rax)
 // CHECK: encoding: [0x0f,0x01,0x0a]         
 sidtq (%rdx) 
 
+// CHECK: sldtw %r13w
+// CHECK: encoding: [0x66,0x41,0x0f,0x00,0xc5]
+sldtw %r13w
+
 // CHECK: sldtl %r13d 
 // CHECK: encoding: [0x41,0x0f,0x00,0xc5]         
 sldtl %r13d 
 
-// CHECK: sldtq 485498096 
-// CHECK: encoding: [0x48,0x0f,0x00,0x04,0x25,0xf0,0x1c,0xf0,0x1c]         
-sldtq 485498096 
-
-// CHECK: sldtq 64(%rdx) 
-// CHECK: encoding: [0x48,0x0f,0x00,0x42,0x40]         
-sldtq 64(%rdx) 
-
-// CHECK: sldtq 64(%rdx,%rax,4) 
-// CHECK: encoding: [0x48,0x0f,0x00,0x44,0x82,0x40]         
-sldtq 64(%rdx,%rax,4) 
-
-// CHECK: sldtq -64(%rdx,%rax,4) 
-// CHECK: encoding: [0x48,0x0f,0x00,0x44,0x82,0xc0]         
-sldtq -64(%rdx,%rax,4) 
-
-// CHECK: sldtq 64(%rdx,%rax) 
-// CHECK: encoding: [0x48,0x0f,0x00,0x44,0x02,0x40]         
-sldtq 64(%rdx,%rax) 
-
-// CHECK: sldtq (%rdx) 
-// CHECK: encoding: [0x48,0x0f,0x00,0x02]         
-sldtq (%rdx) 
+// CHECK: sldtq %r13
+// CHECK: encoding: [0x49,0x0f,0x00,0xc5]
+sldtq %r13
 
 // CHECK: sldtw 485498096 
 // CHECK: encoding: [0x0f,0x00,0x04,0x25,0xf0,0x1c,0xf0,0x1c]