(float_truncate:SF
(match_operand:DF 1 "nonimmediate_operand" "f#Y,f#Y,f#Y,f#Y,mY#f")))
(clobber (match_operand:SF 2 "memory_operand" "=X,m,m,m,X"))]
- "TARGET_80387 && TARGET_SSE2 && !TARGET_SSE_PARTIAL_REGS_FOR_CVTSD2SS"
-{
- switch (which_alternative)
- {
- case 0:
- if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
- return "fstp%z0\t%y0";
- else
- return "fst%z0\t%y0";
- case 4:
- return "#";
- default:
- abort ();
- }
-}
- [(set_attr "type" "fmov,multi,multi,multi,ssecvt")
- (set_attr "mode" "SF,SF,SF,SF,DF")])
-
-(define_insn "*truncdfsf2_1_sse_nooverlap"
- [(set (match_operand:SF 0 "nonimmediate_operand" "=*!m,?f#rx,?r#fx,?x#rf,&Y")
- (float_truncate:SF
- (match_operand:DF 1 "nonimmediate_operand" "f#Y,f#Y,f#Y,f#Y,mY#f")))
- (clobber (match_operand:SF 2 "memory_operand" "=X,m,m,m,X"))]
- "TARGET_80387 && TARGET_SSE2 && TARGET_SSE_PARTIAL_REGS_FOR_CVTSD2SS"
+ "TARGET_80387 && TARGET_SSE2"
{
switch (which_alternative)
{
[(set (match_operand:SF 0 "nonimmediate_operand" "=Y,Y,!m")
(float_truncate:SF
(match_operand:DF 1 "nonimmediate_operand" "Y,mY,f#Y")))]
- "TARGET_80387 && TARGET_SSE2 && !TARGET_SSE_PARTIAL_REGS_FOR_CVTSD2SS
+ "TARGET_80387 && TARGET_SSE2
&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
{
switch (which_alternative)
(set_attr "athlon_decode" "vector,double,*")
(set_attr "mode" "SF,SF,SF")])
-(define_insn "*truncdfsf2_2_nooverlap"
- [(set (match_operand:SF 0 "nonimmediate_operand" "=&Y,!m")
- (float_truncate:SF
- (match_operand:DF 1 "nonimmediate_operand" "mY,f")))]
- "TARGET_80387 && TARGET_SSE2 && TARGET_SSE_PARTIAL_REGS_FOR_CVTSD2SS
- && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
-{
- switch (which_alternative)
- {
- case 0:
- return "#";
- case 1:
- if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
- return "fstp%z0\t%y0";
- else
- return "fst%z0\t%y0";
- default:
- abort ();
- }
-}
- [(set_attr "type" "ssecvt,fmov")
- (set_attr "mode" "DF,SF")])
-
(define_insn "*truncdfsf2_3"
[(set (match_operand:SF 0 "memory_operand" "=m")
(float_truncate:SF
[(set (match_operand:SF 0 "register_operand" "=Y,Y")
(float_truncate:SF
(match_operand:DF 1 "nonimmediate_operand" "Y,mY")))]
- "!TARGET_80387 && TARGET_SSE2 && !TARGET_SSE_PARTIAL_REGS_FOR_CVTSD2SS"
+ "!TARGET_80387 && TARGET_SSE2"
"cvtsd2ss\t{%1, %0|%0, %1}"
[(set_attr "type" "ssecvt")
(set_attr "athlon_decode" "vector,double")
(set_attr "mode" "SF")])
-(define_insn "*truncdfsf2_sse_only_nooverlap"
- [(set (match_operand:SF 0 "register_operand" "=&Y")
- (float_truncate:SF
- (match_operand:DF 1 "nonimmediate_operand" "mY")))]
- "!TARGET_80387 && TARGET_SSE2 && TARGET_SSE_PARTIAL_REGS_FOR_CVTSD2SS"
- "#"
- [(set_attr "type" "ssecvt")
- (set_attr "mode" "DF")])
-
(define_split
[(set (match_operand:SF 0 "memory_operand" "")
(float_truncate:SF
[(set (match_dup 0) (float_truncate:SF (match_dup 1)))]
"")
-; Avoid possible reformatting penalty on the destination by first
-; zeroing it out
(define_split
[(set (match_operand:SF 0 "register_operand" "")
(float_truncate:SF
&& !STACK_REG_P (operands[1])"
[(const_int 0)]
{
- rtx src, dest;
- if (!TARGET_SSE_PARTIAL_REGS_FOR_CVTSD2SS)
- emit_insn (gen_truncdfsf2_sse_only (operands[0], operands[1]));
- else
- {
- dest = simplify_gen_subreg (V4SFmode, operands[0], SFmode, 0);
- src = simplify_gen_subreg (V2DFmode, operands[1], DFmode, 0);
- /* simplify_gen_subreg refuses to widen memory references. */
- if (GET_CODE (src) == SUBREG)
- alter_subreg (&src);
- if (reg_overlap_mentioned_p (operands[0], operands[1]))
- abort ();
- emit_insn (gen_sse_clrv4sf (dest, CONST0_RTX (V4SFmode)));
- emit_insn (gen_cvtsd2ss (dest, dest, src));
- }
- DONE;
-})
-
-(define_split
- [(set (match_operand:SF 0 "register_operand" "")
- (float_truncate:SF
- (match_operand:DF 1 "nonimmediate_operand" "")))]
- "TARGET_80387 && reload_completed
- && SSE_REG_P (operands[0]) && TARGET_SSE_PARTIAL_REGS_FOR_CVTSD2SS"
- [(const_int 0)]
-{
- rtx src, dest;
- dest = simplify_gen_subreg (V4SFmode, operands[0], SFmode, 0);
- src = simplify_gen_subreg (V2DFmode, operands[1], DFmode, 0);
- /* simplify_gen_subreg refuses to widen memory references. */
- if (GET_CODE (src) == SUBREG)
- alter_subreg (&src);
- if (reg_overlap_mentioned_p (operands[0], operands[1]))
- abort ();
- emit_insn (gen_sse_clrv4sf (dest, CONST0_RTX (V4SFmode)));
- emit_insn (gen_cvtsd2ss (dest, dest, src));
+ emit_insn (gen_truncdfsf2_sse_only (operands[0], operands[1]));
DONE;
})