drm/vc4: crtc: Disable color management for HVS5

The HVS5 uses different color matrices. Disable color management support
for now.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Link: https://patchwork.freedesktop.org/patch/msgid/e528e2edf0a1be3930196d437e548114dd9fcf59.1599120059.git-series.maxime@cerno.tech

diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index 0474422..41bc61d 100644 (file)
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
@@ -874,6 +874,7 @@ int vc4_crtc_init(struct drm_device *drm, struct vc4_crtc *vc4_crtc,
                  const struct drm_crtc_funcs *crtc_funcs,
                  const struct drm_crtc_helper_funcs *crtc_helper_funcs)
 {
+       struct vc4_dev *vc4 = to_vc4_dev(drm);
        struct drm_crtc *crtc = &vc4_crtc->base;
        struct drm_plane *primary_plane;
        unsigned int i;
@@ -893,13 +894,17 @@ int vc4_crtc_init(struct drm_device *drm, struct vc4_crtc *vc4_crtc,
        drm_crtc_init_with_planes(drm, crtc, primary_plane, NULL,
                                  crtc_funcs, NULL);
        drm_crtc_helper_add(crtc, crtc_helper_funcs);
-       drm_mode_crtc_set_gamma_size(crtc, ARRAY_SIZE(vc4_crtc->lut_r));
-       drm_crtc_enable_color_mgmt(crtc, 0, false, crtc->gamma_size);
 
-       /* We support CTM, but only for one CRTC at a time. It's therefore
-        * implemented as private driver state in vc4_kms, not here.
-        */
-       drm_crtc_enable_color_mgmt(crtc, 0, true, crtc->gamma_size);
+       if (!vc4->hvs->hvs5) {
+               drm_mode_crtc_set_gamma_size(crtc, ARRAY_SIZE(vc4_crtc->lut_r));
+
+               drm_crtc_enable_color_mgmt(crtc, 0, false, crtc->gamma_size);
+
+               /* We support CTM, but only for one CRTC at a time. It's therefore
+                * implemented as private driver state in vc4_kms, not here.
+                */
+               drm_crtc_enable_color_mgmt(crtc, 0, true, crtc->gamma_size);
+       }
 
        for (i = 0; i < crtc->gamma_size; i++) {
                vc4_crtc->lut_r[i] = i;

diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c
index 31a9bc5..fa61cad 100644 (file)
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
@@ -443,7 +443,7 @@ void vc4_hvs_mode_set_nofb(struct drm_crtc *crtc)
 
        HVS_WRITE(SCALER_DISPBKGNDX(vc4_state->assigned_channel),
                  SCALER_DISPBKGND_AUTOHS |
-                 SCALER_DISPBKGND_GAMMA |
+                 ((!vc4->hvs->hvs5) ? SCALER_DISPBKGND_GAMMA : 0) |
                  (interlace ? SCALER_DISPBKGND_INTERLACE : 0));
 
        /* Reload the LUT, since the SRAMs would have been disabled if