zink: use GENERAL layout for mixed zs fb attachments

this interaction requires read-only sampler access from
depth component with writes to the stencil component, which can only
be done in the GENERAL layout

affects:
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_color_and_stencil_blit

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15716>

diff --git a/src/gallium/drivers/zink/zink_descriptors.c b/src/gallium/drivers/zink/zink_descriptors.c
index b638a09d457704035a01f92efff63c95bfd0a375..cd555ae6099844d4f00a965d51e78a7bc8bcd7d0 100644 (file)
--- a/src/gallium/drivers/zink/zink_descriptors.c
+++ b/src/gallium/drivers/zink/zink_descriptors.c
@@ -31,6 +31,7 @@
 #include "zink_context.h"
 #include "zink_descriptors.h"
 #include "zink_program.h"
+#include "zink_render_pass.h"
 #include "zink_resource.h"
 #include "zink_screen.h"
 
@@ -570,6 +571,9 @@ zink_descriptor_util_image_layout_eval(const struct zink_context *ctx, const str
    if (res->image_bind_count[is_compute])
       return VK_IMAGE_LAYOUT_GENERAL;
    if (res->aspect & (VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT)) {
+      if (!is_compute && res->fb_binds &&
+          ctx->gfx_pipeline_state.render_pass && ctx->gfx_pipeline_state.render_pass->state.rts[ctx->fb_state.nr_cbufs].mixed_zs)
+         return VK_IMAGE_LAYOUT_GENERAL;
       return VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL;
    }
    return VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL;

diff --git a/src/gallium/drivers/zink/zink_render_pass.c b/src/gallium/drivers/zink/zink_render_pass.c
index ab29435d34560628c95d9808b077afaaf8d461fa..a8110d84505acf224ceabfb2fccce8ecb92b1744 100644 (file)
--- a/src/gallium/drivers/zink/zink_render_pass.c
+++ b/src/gallium/drivers/zink/zink_render_pass.c
@@ -70,7 +70,11 @@ create_render_pass(struct zink_screen *screen, struct zink_render_pass_state *st
    if (state->have_zsbuf)  {
       struct zink_rt_attrib *rt = state->rts + state->num_cbufs;
       bool has_clear = rt->clear_color || rt->clear_stencil;
-      VkImageLayout layout = rt->needs_write || has_clear ? VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL : VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL;
+      VkImageLayout layout;
+      if (rt->mixed_zs)
+         layout = VK_IMAGE_LAYOUT_GENERAL;
+      else
+         layout = rt->needs_write || has_clear ? VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL : VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL;
       attachments[num_attachments].flags = 0;
       pstate->attachments[num_attachments].format = attachments[num_attachments].format = rt->format;
       pstate->attachments[num_attachments].samples = attachments[num_attachments].samples = rt->samples;
@@ -195,7 +199,11 @@ create_render_pass2(struct zink_screen *screen, struct zink_render_pass_state *s
    if (state->have_zsbuf)  {
       struct zink_rt_attrib *rt = state->rts + state->num_cbufs;
       bool has_clear = rt->clear_color || rt->clear_stencil;
-      VkImageLayout layout = rt->needs_write || has_clear ? VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL : VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL;
+      VkImageLayout layout;
+      if (rt->mixed_zs)
+         layout = VK_IMAGE_LAYOUT_GENERAL;
+      else
+         layout = rt->needs_write || has_clear ? VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL : VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL;
       attachments[num_attachments].sType = VK_STRUCTURE_TYPE_ATTACHMENT_DESCRIPTION_2;
       attachments[num_attachments].pNext = NULL;
       attachments[num_attachments].flags = 0;
@@ -333,6 +341,10 @@ zink_render_pass_attachment_get_barrier_info(const struct zink_render_pass *rp,
 
    assert(rp->state.have_zsbuf);
    *pipeline = VK_PIPELINE_STAGE_EARLY_FRAGMENT_TESTS_BIT | VK_PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT;
+   if (rp->state.rts[idx].mixed_zs) {
+      *access |= VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_READ_BIT | VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT;
+      return VK_IMAGE_LAYOUT_GENERAL;
+   }
    if (!rp->state.rts[idx].clear_color && !rp->state.rts[idx].clear_stencil)
       *access |= VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_READ_BIT;
    if (!rp->state.rts[idx].clear_color && !rp->state.rts[idx].clear_stencil && !rp->state.rts[idx].needs_write)