ARM: dts: stm32: fix spi1 pin assignment on stm32mp15

[ Upstream commit 1b9f0ec81af0012aae30aa3b4c711ad71d42e246 ]

Bank A and B IOs can't be handled by the pin controller 'Z'. This patch
assign spi1 pin definition to the correct controller.

Fixes: 9ad65d245b7b ("ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group")

Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
index a9d2bec..e15a3b2 100644 (file)
--- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
@@ -1880,6 +1880,21 @@
                };
        };
 
+       spi1_pins_b: spi1-1 {
+               pins1 {
+                       pinmux = <STM32_PINMUX('A', 5, AF5)>, /* SPI1_SCK */
+                                <STM32_PINMUX('B', 5, AF5)>; /* SPI1_MOSI */
+                       bias-disable;
+                       drive-push-pull;
+                       slew-rate = <1>;
+               };
+
+               pins2 {
+                       pinmux = <STM32_PINMUX('A', 6, AF5)>; /* SPI1_MISO */
+                       bias-disable;
+               };
+       };
+
        spi2_pins_a: spi2-0 {
                pins1 {
                        pinmux = <STM32_PINMUX('B', 10, AF5)>, /* SPI2_SCK */
@@ -2448,19 +2463,4 @@
                        bias-disable;
                };
        };
-
-       spi1_pins_b: spi1-1 {
-               pins1 {
-                       pinmux = <STM32_PINMUX('A', 5, AF5)>, /* SPI1_SCK */
-                                <STM32_PINMUX('B', 5, AF5)>; /* SPI1_MOSI */
-                       bias-disable;
-                       drive-push-pull;
-                       slew-rate = <1>;
-               };
-
-               pins2 {
-                       pinmux = <STM32_PINMUX('A', 6, AF5)>; /* SPI1_MISO */
-                       bias-disable;
-               };
-       };
 };