drm/amdkfd: Support dimgrey_cavefish KFD (v2)
authorChengming Gui <Jack.Gui@amd.com>
Fri, 2 Oct 2020 16:20:32 +0000 (12:20 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 12 Oct 2020 18:01:21 +0000 (14:01 -0400)
Add KFD support for dimgrey cavefish.

v2: rebase (Alex)

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdkfd/kfd_crat.c
drivers/gpu/drm/amd/amdkfd/kfd_device.c
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c
drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
drivers/gpu/drm/amd/amdkfd/kfd_topology.c

index 0eeda79..7a071b4 100644 (file)
@@ -681,6 +681,7 @@ static int kfd_fill_gpu_cache_info(struct kfd_dev *kdev,
        case CHIP_NAVI14:
        case CHIP_SIENNA_CICHLID:
        case CHIP_NAVY_FLOUNDER:
+       case CHIP_DIMGREY_CAVEFISH:
                pcache_info = navi10_cache_info;
                num_of_cache_types = ARRAY_SIZE(navi10_cache_info);
                break;
index 81751da..7a1ff80 100644 (file)
@@ -517,6 +517,25 @@ static const struct kfd_device_info vangogh_device_info = {
        .num_sdma_queues_per_engine = 2,
 };
 
+static const struct kfd_device_info dimgrey_cavefish_device_info = {
+       .asic_family = CHIP_DIMGREY_CAVEFISH,
+       .asic_name = "dimgrey_cavefish",
+       .max_pasid_bits = 16,
+       .max_no_of_hqd  = 24,
+       .doorbell_size  = 8,
+       .ih_ring_entry_size = 8 * sizeof(uint32_t),
+       .event_interrupt_class = &event_interrupt_class_v9,
+       .num_of_watch_points = 4,
+       .mqd_size_aligned = MQD_SIZE_ALIGNED,
+       .needs_iommu_device = false,
+       .supports_cwsr = true,
+       .needs_pci_atomics = false,
+       .num_sdma_engines = 2,
+       .num_xgmi_sdma_engines = 0,
+       .num_sdma_queues_per_engine = 8,
+};
+
+
 /* For each entry, [0] is regular and [1] is virtualisation device. */
 static const struct kfd_device_info *kfd_supported_devices[][2] = {
 #ifdef KFD_SUPPORT_IOMMU_V2
@@ -542,6 +561,7 @@ static const struct kfd_device_info *kfd_supported_devices[][2] = {
        [CHIP_SIENNA_CICHLID] = {&sienna_cichlid_device_info, &sienna_cichlid_device_info},
        [CHIP_NAVY_FLOUNDER] = {&navy_flounder_device_info, &navy_flounder_device_info},
        [CHIP_VANGOGH] = {&vangogh_device_info, NULL},
+       [CHIP_DIMGREY_CAVEFISH] = {&dimgrey_cavefish_device_info, &dimgrey_cavefish_device_info},
 };
 
 static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size,
index 7971bbe..c579615 100644 (file)
@@ -1926,6 +1926,7 @@ struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev)
        case CHIP_SIENNA_CICHLID:
        case CHIP_NAVY_FLOUNDER:
        case CHIP_VANGOGH:
+       case CHIP_DIMGREY_CAVEFISH:
                device_queue_manager_init_v10_navi10(&dqm->asic_ops);
                break;
        default:
index 379457d..98a5e1d 100644 (file)
@@ -418,6 +418,7 @@ int kfd_init_apertures(struct kfd_process *process)
                        case CHIP_SIENNA_CICHLID:
                        case CHIP_NAVY_FLOUNDER:
                        case CHIP_VANGOGH:
+                       case CHIP_DIMGREY_CAVEFISH:
                                kfd_init_apertures_v9(pdd, id);
                                break;
                        default:
index 9beb2ea..5d541e0 100644 (file)
@@ -248,6 +248,7 @@ int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm)
        case CHIP_SIENNA_CICHLID:
        case CHIP_NAVY_FLOUNDER:
        case CHIP_VANGOGH:
+       case CHIP_DIMGREY_CAVEFISH:
                pm->pmf = &kfd_v9_pm_funcs;
                break;
        default:
index da6b493..3f2aa05 100644 (file)
@@ -1376,6 +1376,7 @@ int kfd_topology_add_device(struct kfd_dev *gpu)
        case CHIP_SIENNA_CICHLID:
        case CHIP_NAVY_FLOUNDER:
        case CHIP_VANGOGH:
+       case CHIP_DIMGREY_CAVEFISH:
                dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_2_0 <<
                        HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) &
                        HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK);