-2018-03-20 Carl Love <cel@us.ibm.com>
+2018-03-28 Peter Bergner <bergner@vnet.ibm.com>
+
+ PR target/84912
+ * config/rs6000/rs6000.h (RS6000_BTM_POWERPC64): New define.
+ (RS6000_BTM_COMMON): Add RS6000_BTM_POWERPC64.
+ * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add support
+ for RS6000_BTM_POWERPC64.
+ (rs6000_invalid_builtin): Add handling for RS6000_BTM_POWERPC64
+ (rs6000_builtin_mask_names): Add RS6000_BTM_POWERPC64.
+ * config/rs6000/rs6000-builtin.def (BU_P7_POWERPC64_MISC_2): New macro
+ definition.
+ (DIVDE): Use it.
+ (DIVDEU): Likewise.
+
+2018-03-28 Carl Love <cel@us.ibm.com>
Revert
2017-09-27 Carl Love <cel@us.ibm.com>
| RS6000_BTC_BINARY), \
CODE_FOR_ ## ICODE) /* ICODE */
+#define BU_P7_POWERPC64_MISC_2(ENUM, NAME, ATTR, ICODE) \
+ RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \
+ "__builtin_" NAME, /* NAME */ \
+ RS6000_BTM_POPCNTD \
+ | RS6000_BTM_POWERPC64, /* MASK */ \
+ (RS6000_BTC_ ## ATTR /* ATTR */ \
+ | RS6000_BTC_BINARY), \
+ CODE_FOR_ ## ICODE) /* ICODE */
+
#define BU_P7_MISC_X(ENUM, NAME, ATTR) \
RS6000_BUILTIN_X (MISC_BUILTIN_ ## ENUM, /* ENUM */ \
"__builtin_" NAME, /* NAME */ \
/* 2 argument extended divide functions added in ISA 2.06. */
BU_P7_MISC_2 (DIVWE, "divwe", CONST, dive_si)
BU_P7_MISC_2 (DIVWEU, "divweu", CONST, diveu_si)
-BU_P7_MISC_2 (DIVDE, "divde", CONST, dive_di)
-BU_P7_MISC_2 (DIVDEU, "divdeu", CONST, diveu_di)
+BU_P7_POWERPC64_MISC_2 (DIVDE, "divde", CONST, dive_di)
+BU_P7_POWERPC64_MISC_2 (DIVDEU, "divdeu", CONST, diveu_di)
/* 1 argument DFP (decimal floating point) functions added in ISA 2.05. */
BU_DFP_MISC_1 (DXEX, "dxex", CONST, dfp_dxex_dd)
| ((TARGET_P9_MISC) ? RS6000_BTM_P9_MISC : 0)
| ((TARGET_MODULO) ? RS6000_BTM_MODULO : 0)
| ((TARGET_64BIT) ? RS6000_BTM_64BIT : 0)
+ | ((TARGET_POWERPC64) ? RS6000_BTM_POWERPC64 : 0)
| ((TARGET_CRYPTO) ? RS6000_BTM_CRYPTO : 0)
| ((TARGET_HTM) ? RS6000_BTM_HTM : 0)
| ((TARGET_DFP) ? RS6000_BTM_DFP : 0)
name);
else if ((fnmask & RS6000_BTM_FLOAT128) != 0)
error ("builtin function %qs requires the %qs option", name, "-mfloat128");
+ else if ((fnmask & (RS6000_BTM_POPCNTD | RS6000_BTM_POWERPC64))
+ == (RS6000_BTM_POPCNTD | RS6000_BTM_POWERPC64))
+ error ("builtin function %qs requires the %qs (or newer), and "
+ "%qs or %qs options",
+ name, "-mcpu=power7", "-m64", "-mpowerpc64");
else
error ("builtin function %qs is not supported with the current options",
name);
{ "hard-dfp", RS6000_BTM_DFP, false, false },
{ "hard-float", RS6000_BTM_HARD_FLOAT, false, false },
{ "long-double-128", RS6000_BTM_LDBL128, false, false },
+ { "powerpc64", RS6000_BTM_POWERPC64, false, false },
{ "float128", RS6000_BTM_FLOAT128, false, false },
{ "float128-hw", RS6000_BTM_FLOAT128_HW,false, false },
};
#define RS6000_BTM_HARD_FLOAT MASK_SOFT_FLOAT /* Hardware floating point. */
#define RS6000_BTM_LDBL128 MASK_MULTIPLE /* 128-bit long double. */
#define RS6000_BTM_64BIT MASK_64BIT /* 64-bit addressing. */
+#define RS6000_BTM_POWERPC64 MASK_POWERPC64 /* 64-bit registers. */
#define RS6000_BTM_FLOAT128 MASK_FLOAT128_KEYWORD /* IEEE 128-bit float. */
#define RS6000_BTM_FLOAT128_HW MASK_FLOAT128_HW /* IEEE 128-bit float h/w. */
| RS6000_BTM_DFP \
| RS6000_BTM_HARD_FLOAT \
| RS6000_BTM_LDBL128 \
+ | RS6000_BTM_POWERPC64 \
| RS6000_BTM_FLOAT128 \
| RS6000_BTM_FLOAT128_HW)