perf/x86/intel: Support Architectural PerfMon Extension leaf
authorKan Liang <kan.liang@linux.intel.com>
Wed, 4 Jan 2023 20:13:45 +0000 (12:13 -0800)
committerIngo Molnar <mingo@kernel.org>
Mon, 9 Jan 2023 11:22:08 +0000 (12:22 +0100)
The new CPUID leaf 0x23 reports the "true view" of PMU resources.

The sub-leaf 1 reports the available general-purpose counters and fixed
counters. Update the number of counters and fixed counters when the
sub-leaf is detected.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Peter Zijlstra <peterz@infradead.org>
Link: https://lore.kernel.org/r/20230104201349.1451191-5-kan.liang@linux.intel.com
arch/x86/events/intel/core.c
arch/x86/include/asm/perf_event.h

index a5678ab..29d2d04 100644 (file)
@@ -4588,6 +4588,25 @@ static void flip_smm_bit(void *data)
        }
 }
 
+static void intel_pmu_check_num_counters(int *num_counters,
+                                        int *num_counters_fixed,
+                                        u64 *intel_ctrl, u64 fixed_mask);
+
+static void update_pmu_cap(struct x86_hybrid_pmu *pmu)
+{
+       unsigned int sub_bitmaps = cpuid_eax(ARCH_PERFMON_EXT_LEAF);
+       unsigned int eax, ebx, ecx, edx;
+
+       if (sub_bitmaps & ARCH_PERFMON_NUM_COUNTER_LEAF_BIT) {
+               cpuid_count(ARCH_PERFMON_EXT_LEAF, ARCH_PERFMON_NUM_COUNTER_LEAF,
+                           &eax, &ebx, &ecx, &edx);
+               pmu->num_counters = fls(eax);
+               pmu->num_counters_fixed = fls(ebx);
+               intel_pmu_check_num_counters(&pmu->num_counters, &pmu->num_counters_fixed,
+                                            &pmu->intel_ctrl, ebx);
+       }
+}
+
 static bool init_hybrid_pmu(int cpu)
 {
        struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);
@@ -4613,6 +4632,9 @@ static bool init_hybrid_pmu(int cpu)
        if (!cpumask_empty(&pmu->supported_cpus))
                goto end;
 
+       if (this_cpu_has(X86_FEATURE_ARCH_PERFMON_EXT))
+               update_pmu_cap(pmu);
+
        if (!check_hw_exists(&pmu->pmu, pmu->num_counters, pmu->num_counters_fixed))
                return false;
 
index 5d0f689..6496bdb 100644 (file)
@@ -160,6 +160,14 @@ union cpuid10_edx {
 };
 
 /*
+ * Intel "Architectural Performance Monitoring extension" CPUID
+ * detection/enumeration details:
+ */
+#define ARCH_PERFMON_EXT_LEAF                  0x00000023
+#define ARCH_PERFMON_NUM_COUNTER_LEAF_BIT      0x1
+#define ARCH_PERFMON_NUM_COUNTER_LEAF          0x1
+
+/*
  * Intel Architectural LBR CPUID detection/enumeration details:
  */
 union cpuid28_eax {