ilo: update genhw headers
authorChia-I Wu <olvaffe@gmail.com>
Thu, 5 Mar 2015 07:25:43 +0000 (15:25 +0800)
committerChia-I Wu <olvaffe@gmail.com>
Thu, 5 Mar 2015 18:25:03 +0000 (02:25 +0800)
The main change is non-inline <enum>s are now generated as C enums.

src/gallium/drivers/ilo/genhw/gen_eu_isa.xml.h
src/gallium/drivers/ilo/genhw/gen_eu_message.xml.h
src/gallium/drivers/ilo/genhw/gen_mi.xml.h
src/gallium/drivers/ilo/genhw/gen_render.xml.h
src/gallium/drivers/ilo/genhw/gen_render_3d.xml.h
src/gallium/drivers/ilo/genhw/gen_render_dynamic.xml.h
src/gallium/drivers/ilo/genhw/gen_render_surface.xml.h

index 99f6bbc..f91fa5f 100644 (file)
@@ -32,206 +32,263 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */
 
 
-#define GEN6_OPCODE_ILLEGAL                                    0x0
-#define GEN6_OPCODE_MOV                                                0x1
-#define GEN6_OPCODE_SEL                                                0x2
-#define GEN6_OPCODE_MOVI                                       0x3
-#define GEN6_OPCODE_NOT                                                0x4
-#define GEN6_OPCODE_AND                                                0x5
-#define GEN6_OPCODE_OR                                         0x6
-#define GEN6_OPCODE_XOR                                                0x7
-#define GEN6_OPCODE_SHR                                                0x8
-#define GEN6_OPCODE_SHL                                                0x9
-#define GEN6_OPCODE_DIM                                                0xa
-#define GEN6_OPCODE_ASR                                                0xc
-#define GEN6_OPCODE_CMP                                                0x10
-#define GEN6_OPCODE_CMPN                                       0x11
-#define GEN7_OPCODE_CSEL                                       0x12
-#define GEN7_OPCODE_F32TO16                                    0x13
-#define GEN7_OPCODE_F16TO32                                    0x14
-#define GEN7_OPCODE_BFREV                                      0x17
-#define GEN7_OPCODE_BFE                                                0x18
-#define GEN7_OPCODE_BFI1                                       0x19
-#define GEN7_OPCODE_BFI2                                       0x1a
-#define GEN6_OPCODE_JMPI                                       0x20
-#define GEN7_OPCODE_BRD                                                0x21
-#define GEN6_OPCODE_IF                                         0x22
-#define GEN7_OPCODE_BRC                                                0x23
-#define GEN6_OPCODE_ELSE                                       0x24
-#define GEN6_OPCODE_ENDIF                                      0x25
-#define GEN6_OPCODE_CASE                                       0x26
-#define GEN6_OPCODE_WHILE                                      0x27
-#define GEN6_OPCODE_BREAK                                      0x28
-#define GEN6_OPCODE_CONT                                       0x29
-#define GEN6_OPCODE_HALT                                       0x2a
-#define GEN75_OPCODE_CALLA                                     0x2b
-#define GEN6_OPCODE_CALL                                       0x2c
-#define GEN6_OPCODE_RETURN                                     0x2d
-#define GEN8_OPCODE_GOTO                                       0x2e
-#define GEN6_OPCODE_WAIT                                       0x30
-#define GEN6_OPCODE_SEND                                       0x31
-#define GEN6_OPCODE_SENDC                                      0x32
-#define GEN6_OPCODE_MATH                                       0x38
-#define GEN6_OPCODE_ADD                                                0x40
-#define GEN6_OPCODE_MUL                                                0x41
-#define GEN6_OPCODE_AVG                                                0x42
-#define GEN6_OPCODE_FRC                                                0x43
-#define GEN6_OPCODE_RNDU                                       0x44
-#define GEN6_OPCODE_RNDD                                       0x45
-#define GEN6_OPCODE_RNDE                                       0x46
-#define GEN6_OPCODE_RNDZ                                       0x47
-#define GEN6_OPCODE_MAC                                                0x48
-#define GEN6_OPCODE_MACH                                       0x49
-#define GEN6_OPCODE_LZD                                                0x4a
-#define GEN7_OPCODE_FBH                                                0x4b
-#define GEN7_OPCODE_FBL                                                0x4c
-#define GEN7_OPCODE_CBIT                                       0x4d
-#define GEN7_OPCODE_ADDC                                       0x4e
-#define GEN7_OPCODE_SUBB                                       0x4f
-#define GEN6_OPCODE_SAD2                                       0x50
-#define GEN6_OPCODE_SADA2                                      0x51
-#define GEN6_OPCODE_DP4                                                0x54
-#define GEN6_OPCODE_DPH                                                0x55
-#define GEN6_OPCODE_DP3                                                0x56
-#define GEN6_OPCODE_DP2                                                0x57
-#define GEN6_OPCODE_LINE                                       0x59
-#define GEN6_OPCODE_PLN                                                0x5a
-#define GEN6_OPCODE_MAD                                                0x5b
-#define GEN6_OPCODE_LRP                                                0x5c
-#define GEN6_OPCODE_NOP                                                0x7e
-#define GEN6_ALIGN_1                                           0x0
-#define GEN6_ALIGN_16                                          0x1
-#define GEN6_MASKCTRL_NORMAL                                   0x0
-#define GEN6_MASKCTRL_NOMASK                                   0x1
-#define GEN6_DEPCTRL_NORMAL                                    0x0
-#define GEN6_DEPCTRL_NODDCLR                                   0x1
-#define GEN6_DEPCTRL_NODDCHK                                   0x2
-#define GEN6_DEPCTRL_NEITHER                                   0x3
-#define GEN6_QTRCTRL_1Q                                                0x0
-#define GEN6_QTRCTRL_2Q                                                0x1
-#define GEN6_QTRCTRL_3Q                                                0x2
-#define GEN6_QTRCTRL_4Q                                                0x3
-#define GEN6_QTRCTRL_1H                                                0x0
-#define GEN6_QTRCTRL_2H                                                0x2
-#define GEN6_THREADCTRL_NORMAL                                 0x0
-#define GEN6_THREADCTRL_ATOMIC                                 0x1
-#define GEN6_THREADCTRL_SWITCH                                 0x2
-#define GEN6_PREDCTRL_NONE                                     0x0
-#define GEN6_PREDCTRL_NORMAL                                   0x1
-#define GEN6_PREDCTRL_ANYV                                     0x2
-#define GEN6_PREDCTRL_ALLV                                     0x3
-#define GEN6_PREDCTRL_ANY2H                                    0x4
-#define GEN6_PREDCTRL_ALL2H                                    0x5
-#define GEN6_PREDCTRL_X                                                0x2
-#define GEN6_PREDCTRL_Y                                                0x3
-#define GEN6_PREDCTRL_Z                                                0x4
-#define GEN6_PREDCTRL_W                                                0x5
-#define GEN6_PREDCTRL_ANY4H                                    0x6
-#define GEN6_PREDCTRL_ALL4H                                    0x7
-#define GEN6_PREDCTRL_ANY8H                                    0x8
-#define GEN6_PREDCTRL_ALL8H                                    0x9
-#define GEN6_PREDCTRL_ANY16H                                   0xa
-#define GEN6_PREDCTRL_ALL16H                                   0xb
-#define GEN7_PREDCTRL_ANY32H                                   0xc
-#define GEN7_PREDCTRL_ALL32H                                   0xd
-#define GEN6_EXECSIZE_1                                                0x0
-#define GEN6_EXECSIZE_2                                                0x1
-#define GEN6_EXECSIZE_4                                                0x2
-#define GEN6_EXECSIZE_8                                                0x3
-#define GEN6_EXECSIZE_16                                       0x4
-#define GEN6_EXECSIZE_32                                       0x5
-#define GEN6_COND_NONE                                         0x0
-#define GEN6_COND_Z                                            0x1
-#define GEN6_COND_NZ                                           0x2
-#define GEN6_COND_G                                            0x3
-#define GEN6_COND_GE                                           0x4
-#define GEN6_COND_L                                            0x5
-#define GEN6_COND_LE                                           0x6
-#define GEN6_COND_O                                            0x8
-#define GEN6_COND_U                                            0x9
-#define GEN6_MATH_INV                                          0x1
-#define GEN6_MATH_LOG                                          0x2
-#define GEN6_MATH_EXP                                          0x3
-#define GEN6_MATH_SQRT                                         0x4
-#define GEN6_MATH_RSQ                                          0x5
-#define GEN6_MATH_SIN                                          0x6
-#define GEN6_MATH_COS                                          0x7
-#define GEN6_MATH_FDIV                                         0x9
-#define GEN6_MATH_POW                                          0xa
-#define GEN6_MATH_INT_DIV                                      0xb
-#define GEN6_MATH_INT_DIV_QUOTIENT                             0xc
-#define GEN6_MATH_INT_DIV_REMAINDER                            0xd
-#define GEN8_MATH_INVM                                         0xe
-#define GEN8_MATH_RSQRTM                                       0xf
-#define GEN6_SFID_NULL                                         0x0
-#define GEN6_SFID_SAMPLER                                      0x2
-#define GEN6_SFID_GATEWAY                                      0x3
-#define GEN6_SFID_DP_SAMPLER                                   0x4
-#define GEN6_SFID_DP_RC                                                0x5
-#define GEN6_SFID_URB                                          0x6
-#define GEN6_SFID_SPAWNER                                      0x7
-#define GEN6_SFID_VME                                          0x8
-#define GEN6_SFID_DP_CC                                                0x9
-#define GEN7_SFID_DP_DC0                                       0xa
-#define GEN7_SFID_PI                                           0xb
-#define GEN75_SFID_DP_DC1                                      0xc
-#define GEN6_FILE_ARF                                          0x0
-#define GEN6_FILE_GRF                                          0x1
-#define GEN6_FILE_MRF                                          0x2
-#define GEN6_FILE_IMM                                          0x3
-#define GEN6_TYPE_UD                                           0x0
-#define GEN6_TYPE_D                                            0x1
-#define GEN6_TYPE_UW                                           0x2
-#define GEN6_TYPE_W                                            0x3
-#define GEN6_TYPE_UB                                           0x4
-#define GEN6_TYPE_B                                            0x5
-#define GEN7_TYPE_DF                                           0x6
-#define GEN6_TYPE_F                                            0x7
-#define GEN8_TYPE_UQ                                           0x8
-#define GEN8_TYPE_Q                                            0x9
-#define GEN8_TYPE_HF                                           0xa
-#define GEN6_TYPE_UV_IMM                                       0x4
-#define GEN6_TYPE_VF_IMM                                       0x5
-#define GEN6_TYPE_V_IMM                                                0x6
-#define GEN8_TYPE_DF_IMM                                       0xa
-#define GEN8_TYPE_HF_IMM                                       0xb
-#define GEN7_TYPE_F_3SRC                                       0x0
-#define GEN7_TYPE_D_3SRC                                       0x1
-#define GEN7_TYPE_UD_3SRC                                      0x2
-#define GEN7_TYPE_DF_3SRC                                      0x3
-#define GEN6_VERTSTRIDE_0                                      0x0
-#define GEN6_VERTSTRIDE_1                                      0x1
-#define GEN6_VERTSTRIDE_2                                      0x2
-#define GEN6_VERTSTRIDE_4                                      0x3
-#define GEN6_VERTSTRIDE_8                                      0x4
-#define GEN6_VERTSTRIDE_16                                     0x5
-#define GEN6_VERTSTRIDE_32                                     0x6
-#define GEN6_VERTSTRIDE_VXH                                    0xf
-#define GEN6_WIDTH_1                                           0x0
-#define GEN6_WIDTH_2                                           0x1
-#define GEN6_WIDTH_4                                           0x2
-#define GEN6_WIDTH_8                                           0x3
-#define GEN6_WIDTH_16                                          0x4
-#define GEN6_HORZSTRIDE_0                                      0x0
-#define GEN6_HORZSTRIDE_1                                      0x1
-#define GEN6_HORZSTRIDE_2                                      0x2
-#define GEN6_HORZSTRIDE_4                                      0x3
-#define GEN6_ADDRMODE_DIRECT                                   0x0
-#define GEN6_ADDRMODE_INDIRECT                                 0x1
-#define GEN6_SWIZZLE_X                                         0x0
-#define GEN6_SWIZZLE_Y                                         0x1
-#define GEN6_SWIZZLE_Z                                         0x2
-#define GEN6_SWIZZLE_W                                         0x3
-#define GEN6_ARF_NULL                                          0x0
-#define GEN6_ARF_A0                                            0x10
-#define GEN6_ARF_ACC0                                          0x20
-#define GEN6_ARF_F0                                            0x30
-#define GEN6_ARF_SR0                                           0x70
-#define GEN6_ARF_CR0                                           0x80
-#define GEN6_ARF_N0                                            0x90
-#define GEN6_ARF_IP                                            0xa0
-#define GEN6_ARF_TDR                                           0xb0
-#define GEN7_ARF_TM0                                           0xc0
+enum gen_eu_opcode {
+    GEN6_OPCODE_ILLEGAL                                              = 0x0,
+    GEN6_OPCODE_MOV                                          = 0x1,
+    GEN6_OPCODE_SEL                                          = 0x2,
+    GEN6_OPCODE_MOVI                                         = 0x3,
+    GEN6_OPCODE_NOT                                          = 0x4,
+    GEN6_OPCODE_AND                                          = 0x5,
+    GEN6_OPCODE_OR                                           = 0x6,
+    GEN6_OPCODE_XOR                                          = 0x7,
+    GEN6_OPCODE_SHR                                          = 0x8,
+    GEN6_OPCODE_SHL                                          = 0x9,
+    GEN6_OPCODE_DIM                                          = 0xa,
+    GEN6_OPCODE_ASR                                          = 0xc,
+    GEN6_OPCODE_CMP                                          = 0x10,
+    GEN6_OPCODE_CMPN                                         = 0x11,
+    GEN7_OPCODE_CSEL                                         = 0x12,
+    GEN7_OPCODE_F32TO16                                              = 0x13,
+    GEN7_OPCODE_F16TO32                                              = 0x14,
+    GEN7_OPCODE_BFREV                                        = 0x17,
+    GEN7_OPCODE_BFE                                          = 0x18,
+    GEN7_OPCODE_BFI1                                         = 0x19,
+    GEN7_OPCODE_BFI2                                         = 0x1a,
+    GEN6_OPCODE_JMPI                                         = 0x20,
+    GEN7_OPCODE_BRD                                          = 0x21,
+    GEN6_OPCODE_IF                                           = 0x22,
+    GEN7_OPCODE_BRC                                          = 0x23,
+    GEN6_OPCODE_ELSE                                         = 0x24,
+    GEN6_OPCODE_ENDIF                                        = 0x25,
+    GEN6_OPCODE_CASE                                         = 0x26,
+    GEN6_OPCODE_WHILE                                        = 0x27,
+    GEN6_OPCODE_BREAK                                        = 0x28,
+    GEN6_OPCODE_CONT                                         = 0x29,
+    GEN6_OPCODE_HALT                                         = 0x2a,
+    GEN75_OPCODE_CALLA                                       = 0x2b,
+    GEN6_OPCODE_CALL                                         = 0x2c,
+    GEN6_OPCODE_RETURN                                       = 0x2d,
+    GEN8_OPCODE_GOTO                                         = 0x2e,
+    GEN6_OPCODE_WAIT                                         = 0x30,
+    GEN6_OPCODE_SEND                                         = 0x31,
+    GEN6_OPCODE_SENDC                                        = 0x32,
+    GEN6_OPCODE_MATH                                         = 0x38,
+    GEN6_OPCODE_ADD                                          = 0x40,
+    GEN6_OPCODE_MUL                                          = 0x41,
+    GEN6_OPCODE_AVG                                          = 0x42,
+    GEN6_OPCODE_FRC                                          = 0x43,
+    GEN6_OPCODE_RNDU                                         = 0x44,
+    GEN6_OPCODE_RNDD                                         = 0x45,
+    GEN6_OPCODE_RNDE                                         = 0x46,
+    GEN6_OPCODE_RNDZ                                         = 0x47,
+    GEN6_OPCODE_MAC                                          = 0x48,
+    GEN6_OPCODE_MACH                                         = 0x49,
+    GEN6_OPCODE_LZD                                          = 0x4a,
+    GEN7_OPCODE_FBH                                          = 0x4b,
+    GEN7_OPCODE_FBL                                          = 0x4c,
+    GEN7_OPCODE_CBIT                                         = 0x4d,
+    GEN7_OPCODE_ADDC                                         = 0x4e,
+    GEN7_OPCODE_SUBB                                         = 0x4f,
+    GEN6_OPCODE_SAD2                                         = 0x50,
+    GEN6_OPCODE_SADA2                                        = 0x51,
+    GEN6_OPCODE_DP4                                          = 0x54,
+    GEN6_OPCODE_DPH                                          = 0x55,
+    GEN6_OPCODE_DP3                                          = 0x56,
+    GEN6_OPCODE_DP2                                          = 0x57,
+    GEN6_OPCODE_LINE                                         = 0x59,
+    GEN6_OPCODE_PLN                                          = 0x5a,
+    GEN6_OPCODE_MAD                                          = 0x5b,
+    GEN6_OPCODE_LRP                                          = 0x5c,
+    GEN6_OPCODE_NOP                                          = 0x7e,
+};
+
+enum gen_eu_access_mode {
+    GEN6_ALIGN_1                                             = 0x0,
+    GEN6_ALIGN_16                                            = 0x1,
+};
+
+enum gen_eu_mask_control {
+    GEN6_MASKCTRL_NORMAL                                     = 0x0,
+    GEN6_MASKCTRL_NOMASK                                     = 0x1,
+};
+
+enum gen_eu_dependency_control {
+    GEN6_DEPCTRL_NORMAL                                              = 0x0,
+    GEN6_DEPCTRL_NODDCLR                                     = 0x1,
+    GEN6_DEPCTRL_NODDCHK                                     = 0x2,
+    GEN6_DEPCTRL_NEITHER                                     = 0x3,
+};
+
+enum gen_eu_quarter_control {
+    GEN6_QTRCTRL_1Q                                          = 0x0,
+    GEN6_QTRCTRL_2Q                                          = 0x1,
+    GEN6_QTRCTRL_3Q                                          = 0x2,
+    GEN6_QTRCTRL_4Q                                          = 0x3,
+    GEN6_QTRCTRL_1H                                          = 0x0,
+    GEN6_QTRCTRL_2H                                          = 0x2,
+};
+
+enum gen_eu_thread_control {
+    GEN6_THREADCTRL_NORMAL                                   = 0x0,
+    GEN6_THREADCTRL_ATOMIC                                   = 0x1,
+    GEN6_THREADCTRL_SWITCH                                   = 0x2,
+};
+
+enum gen_eu_predicate_control {
+    GEN6_PREDCTRL_NONE                                       = 0x0,
+    GEN6_PREDCTRL_NORMAL                                     = 0x1,
+    GEN6_PREDCTRL_ANYV                                       = 0x2,
+    GEN6_PREDCTRL_ALLV                                       = 0x3,
+    GEN6_PREDCTRL_ANY2H                                              = 0x4,
+    GEN6_PREDCTRL_ALL2H                                              = 0x5,
+    GEN6_PREDCTRL_X                                          = 0x2,
+    GEN6_PREDCTRL_Y                                          = 0x3,
+    GEN6_PREDCTRL_Z                                          = 0x4,
+    GEN6_PREDCTRL_W                                          = 0x5,
+    GEN6_PREDCTRL_ANY4H                                              = 0x6,
+    GEN6_PREDCTRL_ALL4H                                              = 0x7,
+    GEN6_PREDCTRL_ANY8H                                              = 0x8,
+    GEN6_PREDCTRL_ALL8H                                              = 0x9,
+    GEN6_PREDCTRL_ANY16H                                     = 0xa,
+    GEN6_PREDCTRL_ALL16H                                     = 0xb,
+    GEN7_PREDCTRL_ANY32H                                     = 0xc,
+    GEN7_PREDCTRL_ALL32H                                     = 0xd,
+};
+
+enum gen_eu_exec_size {
+    GEN6_EXECSIZE_1                                          = 0x0,
+    GEN6_EXECSIZE_2                                          = 0x1,
+    GEN6_EXECSIZE_4                                          = 0x2,
+    GEN6_EXECSIZE_8                                          = 0x3,
+    GEN6_EXECSIZE_16                                         = 0x4,
+    GEN6_EXECSIZE_32                                         = 0x5,
+};
+
+enum gen_eu_condition_modifier {
+    GEN6_COND_NONE                                           = 0x0,
+    GEN6_COND_Z                                                      = 0x1,
+    GEN6_COND_NZ                                             = 0x2,
+    GEN6_COND_G                                                      = 0x3,
+    GEN6_COND_GE                                             = 0x4,
+    GEN6_COND_L                                                      = 0x5,
+    GEN6_COND_LE                                             = 0x6,
+    GEN6_COND_O                                                      = 0x8,
+    GEN6_COND_U                                                      = 0x9,
+};
+
+enum gen_eu_math_function_control {
+    GEN6_MATH_INV                                            = 0x1,
+    GEN6_MATH_LOG                                            = 0x2,
+    GEN6_MATH_EXP                                            = 0x3,
+    GEN6_MATH_SQRT                                           = 0x4,
+    GEN6_MATH_RSQ                                            = 0x5,
+    GEN6_MATH_SIN                                            = 0x6,
+    GEN6_MATH_COS                                            = 0x7,
+    GEN6_MATH_FDIV                                           = 0x9,
+    GEN6_MATH_POW                                            = 0xa,
+    GEN6_MATH_INT_DIV                                        = 0xb,
+    GEN6_MATH_INT_DIV_QUOTIENT                               = 0xc,
+    GEN6_MATH_INT_DIV_REMAINDER                                      = 0xd,
+    GEN8_MATH_INVM                                           = 0xe,
+    GEN8_MATH_RSQRTM                                         = 0xf,
+};
+
+enum gen_eu_shared_function_id {
+    GEN6_SFID_NULL                                           = 0x0,
+    GEN6_SFID_SAMPLER                                        = 0x2,
+    GEN6_SFID_GATEWAY                                        = 0x3,
+    GEN6_SFID_DP_SAMPLER                                     = 0x4,
+    GEN6_SFID_DP_RC                                          = 0x5,
+    GEN6_SFID_URB                                            = 0x6,
+    GEN6_SFID_SPAWNER                                        = 0x7,
+    GEN6_SFID_VME                                            = 0x8,
+    GEN6_SFID_DP_CC                                          = 0x9,
+    GEN7_SFID_DP_DC0                                         = 0xa,
+    GEN7_SFID_PI                                             = 0xb,
+    GEN75_SFID_DP_DC1                                        = 0xc,
+};
+
+enum gen_eu_reg_file {
+    GEN6_FILE_ARF                                            = 0x0,
+    GEN6_FILE_GRF                                            = 0x1,
+    GEN6_FILE_MRF                                            = 0x2,
+    GEN6_FILE_IMM                                            = 0x3,
+};
+
+enum gen_eu_reg_type {
+    GEN6_TYPE_UD                                             = 0x0,
+    GEN6_TYPE_D                                                      = 0x1,
+    GEN6_TYPE_UW                                             = 0x2,
+    GEN6_TYPE_W                                                      = 0x3,
+    GEN6_TYPE_UB                                             = 0x4,
+    GEN6_TYPE_B                                                      = 0x5,
+    GEN7_TYPE_DF                                             = 0x6,
+    GEN6_TYPE_F                                                      = 0x7,
+    GEN8_TYPE_UQ                                             = 0x8,
+    GEN8_TYPE_Q                                                      = 0x9,
+    GEN8_TYPE_HF                                             = 0xa,
+    GEN6_TYPE_UV_IMM                                         = 0x4,
+    GEN6_TYPE_VF_IMM                                         = 0x5,
+    GEN6_TYPE_V_IMM                                          = 0x6,
+    GEN8_TYPE_DF_IMM                                         = 0xa,
+    GEN8_TYPE_HF_IMM                                         = 0xb,
+    GEN7_TYPE_F_3SRC                                         = 0x0,
+    GEN7_TYPE_D_3SRC                                         = 0x1,
+    GEN7_TYPE_UD_3SRC                                        = 0x2,
+    GEN7_TYPE_DF_3SRC                                        = 0x3,
+};
+
+enum gen_eu_vertical_stride {
+    GEN6_VERTSTRIDE_0                                        = 0x0,
+    GEN6_VERTSTRIDE_1                                        = 0x1,
+    GEN6_VERTSTRIDE_2                                        = 0x2,
+    GEN6_VERTSTRIDE_4                                        = 0x3,
+    GEN6_VERTSTRIDE_8                                        = 0x4,
+    GEN6_VERTSTRIDE_16                                       = 0x5,
+    GEN6_VERTSTRIDE_32                                       = 0x6,
+    GEN6_VERTSTRIDE_VXH                                              = 0xf,
+};
+
+enum gen_eu_width {
+    GEN6_WIDTH_1                                             = 0x0,
+    GEN6_WIDTH_2                                             = 0x1,
+    GEN6_WIDTH_4                                             = 0x2,
+    GEN6_WIDTH_8                                             = 0x3,
+    GEN6_WIDTH_16                                            = 0x4,
+};
+
+enum gen_eu_horizontal_stride {
+    GEN6_HORZSTRIDE_0                                        = 0x0,
+    GEN6_HORZSTRIDE_1                                        = 0x1,
+    GEN6_HORZSTRIDE_2                                        = 0x2,
+    GEN6_HORZSTRIDE_4                                        = 0x3,
+};
+
+enum gen_eu_addressing_mode {
+    GEN6_ADDRMODE_DIRECT                                     = 0x0,
+    GEN6_ADDRMODE_INDIRECT                                   = 0x1,
+};
+
+enum gen_eu_swizzle {
+    GEN6_SWIZZLE_X                                           = 0x0,
+    GEN6_SWIZZLE_Y                                           = 0x1,
+    GEN6_SWIZZLE_Z                                           = 0x2,
+    GEN6_SWIZZLE_W                                           = 0x3,
+};
+
+enum gen_eu_arf_reg {
+    GEN6_ARF_NULL                                            = 0x0,
+    GEN6_ARF_A0                                                      = 0x10,
+    GEN6_ARF_ACC0                                            = 0x20,
+    GEN6_ARF_F0                                                      = 0x30,
+    GEN6_ARF_SR0                                             = 0x70,
+    GEN6_ARF_CR0                                             = 0x80,
+    GEN6_ARF_N0                                                      = 0x90,
+    GEN6_ARF_IP                                                      = 0xa0,
+    GEN6_ARF_TDR                                             = 0xb0,
+    GEN7_ARF_TM0                                             = 0xc0,
+};
+
 #define GEN6_INST_SATURATE                                     (0x1 << 31)
 #define GEN6_INST_DEBUGCTRL                                    (0x1 << 30)
 #define GEN6_INST_CMPTCTRL                                     (0x1 << 29)
index 43933f4..fe8b269 100644 (file)
@@ -32,137 +32,158 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */
 
 
-#define GEN6_MSG_URB_WRITE                                     0x0
-#define GEN6_MSG_URB_FF_SYNC                                   0x1
-#define GEN7_MSG_URB_WRITE_HWORD                               0x0
-#define GEN7_MSG_URB_WRITE_OWORD                               0x1
-#define GEN7_MSG_URB_READ_HWORD                                        0x2
-#define GEN7_MSG_URB_READ_OWORD                                        0x3
-#define GEN7_MSG_URB_ATOMIC_MOV                                        0x4
-#define GEN7_MSG_URB_ATOMIC_INC                                        0x5
-#define GEN8_MSG_URB_SIMD8_WRITE                               0x7
-#define GEN7_MSG_PI_SIMD8                                      0x0
-#define GEN7_MSG_PI_SIMD16                                     0x1
-#define GEN7_MSG_PI_EVAL_SNAPPED_IMM                           0x0
-#define GEN7_MSG_PI_EVAL_SINDEX                                        0x1
-#define GEN7_MSG_PI_EVAL_CENTROID                              0x2
-#define GEN7_MSG_PI_EVAL_SNAPPED                               0x3
-#define GEN6_MSG_SAMPLER_SIMD4X2                               0x0
-#define GEN9_MSG_SAMPLER_SIMD8D                                        0x0
-#define GEN6_MSG_SAMPLER_SIMD8                                 0x1
-#define GEN6_MSG_SAMPLER_SIMD16                                        0x2
-#define GEN6_MSG_SAMPLER_SIMD32_64                             0x3
-#define GEN6_MSG_SAMPLER_SAMPLE                                        0x0
-#define GEN6_MSG_SAMPLER_SAMPLE_B                              0x1
-#define GEN6_MSG_SAMPLER_SAMPLE_L                              0x2
-#define GEN6_MSG_SAMPLER_SAMPLE_C                              0x3
-#define GEN6_MSG_SAMPLER_SAMPLE_D                              0x4
-#define GEN6_MSG_SAMPLER_SAMPLE_B_C                            0x5
-#define GEN6_MSG_SAMPLER_SAMPLE_L_C                            0x6
-#define GEN6_MSG_SAMPLER_LD                                    0x7
-#define GEN6_MSG_SAMPLER_GATHER4                               0x8
-#define GEN6_MSG_SAMPLER_LOD                                   0x9
-#define GEN6_MSG_SAMPLER_RESINFO                               0xa
-#define GEN6_MSG_SAMPLER_SAMPLEINFO                            0xb
-#define GEN7_MSG_SAMPLER_GATHER4_C                             0x10
-#define GEN7_MSG_SAMPLER_GATHER4_PO                            0x11
-#define GEN7_MSG_SAMPLER_GATHER4_PO_C                          0x12
-#define GEN7_MSG_SAMPLER_SAMPLE_D_C                            0x14
-#define GEN7_MSG_SAMPLER_SAMPLE_LZ                             0x18
-#define GEN7_MSG_SAMPLER_SAMPLE_C_LC                           0x19
-#define GEN7_MSG_SAMPLER_LD_LZ                                 0x1a
-#define GEN7_MSG_SAMPLER_LD_MCS                                        0x1d
-#define GEN7_MSG_SAMPLER_LD2DMS                                        0x1e
-#define GEN7_MSG_SAMPLER_LD2DSS                                        0x1f
-#define GEN6_MSG_DP_OWORD_BLOCK_READ                           0x0
-#define GEN6_MSG_DP_RT_UNORM_READ                              0x1
-#define GEN6_MSG_DP_OWORD_DUAL_BLOCK_READ                      0x2
-#define GEN6_MSG_DP_MEDIA_BLOCK_READ                           0x4
-#define GEN6_MSG_DP_UNALIGNED_OWORD_BLOCK_READ                 0x5
-#define GEN6_MSG_DP_DWORD_SCATTERED_READ                       0x6
-#define GEN6_MSG_DP_DWORD_ATOMIC_WRITE                         0x7
-#define GEN6_MSG_DP_OWORD_BLOCK_WRITE                          0x8
-#define GEN6_MSG_DP_OWORD_DUAL_BLOCK_WRITE                     0x9
-#define GEN6_MSG_DP_MEDIA_BLOCK_WRITE                          0xa
-#define GEN6_MSG_DP_DWORD_SCATTERED_WRITE                      0xb
-#define GEN6_MSG_DP_RT_WRITE                                   0xc
-#define GEN6_MSG_DP_SVB_WRITE                                  0xd
-#define GEN6_MSG_DP_RT_UNORM_WRITE                             0xe
-#define GEN7_MSG_DP_SAMPLER_UNALIGNED_OWORD_BLOCK_READ         0x1
-#define GEN7_MSG_DP_SAMPLER_MEDIA_BLOCK_READ                   0x4
-#define GEN7_MSG_DP_RC_MEDIA_BLOCK_READ                                0x4
-#define GEN7_MSG_DP_RC_TYPED_SURFACE_READ                      0x5
-#define GEN7_MSG_DP_RC_TYPED_ATOMIC_OP                         0x6
-#define GEN7_MSG_DP_RC_MEMORY_FENCE                            0x7
-#define GEN7_MSG_DP_RC_MEDIA_BLOCK_WRITE                       0xa
-#define GEN7_MSG_DP_RC_RT_WRITE                                        0xc
-#define GEN7_MSG_DP_RC_TYPED_SURFACE_WRITE                     0xd
-#define GEN7_MSG_DP_CC_OWORD_BLOCK_READ                                0x0
-#define GEN7_MSG_DP_CC_UNALIGNED_OWORD_BLOCK_READ              0x1
-#define GEN7_MSG_DP_CC_OWORD_DUAL_BLOCK_READ                   0x2
-#define GEN7_MSG_DP_CC_DWORD_SCATTERED_READ                    0x3
-#define GEN7_MSG_DP_DC0_OWORD_BLOCK_READ                       0x0
-#define GEN7_MSG_DP_DC0_UNALIGNED_OWORD_BLOCK_READ             0x1
-#define GEN7_MSG_DP_DC0_OWORD_DUAL_BLOCK_READ                  0x2
-#define GEN7_MSG_DP_DC0_DWORD_SCATTERED_READ                   0x3
-#define GEN7_MSG_DP_DC0_BYTE_SCATTERED_READ                    0x4
-#define GEN7_MSG_DP_DC0_UNTYPED_SURFACE_READ                   0x5
-#define GEN7_MSG_DP_DC0_UNTYPED_ATOMIC_OP                      0x6
-#define GEN7_MSG_DP_DC0_MEMORY_FENCE                           0x7
-#define GEN7_MSG_DP_DC0_OWORD_BLOCK_WRITE                      0x8
-#define GEN7_MSG_DP_DC0_OWORD_DUAL_BLOCK_WRITE                 0xa
-#define GEN7_MSG_DP_DC0_DWORD_SCATTERED_WRITE                  0xb
-#define GEN7_MSG_DP_DC0_BYTE_SCATTERED_WRITE                   0xc
-#define GEN7_MSG_DP_DC0_UNTYPED_SURFACE_WRITE                  0xd
-#define GEN75_MSG_DP_SAMPLER_READ_SURFACE_INFO                 0x0
-#define GEN75_MSG_DP_SAMPLER_UNALIGNED_OWORD_BLOCK_READ                0x1
-#define GEN75_MSG_DP_SAMPLER_MEDIA_BLOCK_READ                  0x4
-#define GEN75_MSG_DP_RC_MEDIA_BLOCK_READ                       0x4
-#define GEN75_MSG_DP_RC_MEMORY_FENCE                           0x7
-#define GEN75_MSG_DP_RC_MEDIA_BLOCK_WRITE                      0xa
-#define GEN75_MSG_DP_RC_RT_WRITE                               0xc
-#define GEN75_MSG_DP_CC_OWORD_BLOCK_READ                       0x0
-#define GEN75_MSG_DP_CC_UNALIGNED_OWORD_BLOCK_READ             0x1
-#define GEN75_MSG_DP_CC_OWORD_DUAL_BLOCK_READ                  0x2
-#define GEN75_MSG_DP_CC_DWORD_SCATTERED_READ                   0x3
-#define GEN75_MSG_DP_DC0_OWORD_BLOCK_READ                      0x0
-#define GEN75_MSG_DP_DC0_UNALIGNED_OWORD_BLOCK_READ            0x1
-#define GEN75_MSG_DP_DC0_OWORD_DUAL_BLOCK_READ                 0x2
-#define GEN75_MSG_DP_DC0_DWORD_SCATTERED_READ                  0x3
-#define GEN75_MSG_DP_DC0_BYTE_SCATTERED_READ                   0x4
-#define GEN75_MSG_DP_DC0_MEMORY_FENCE                          0x7
-#define GEN75_MSG_DP_DC0_OWORD_BLOCK_WRITE                     0x8
-#define GEN75_MSG_DP_DC0_OWORD_DUAL_BLOCK_WRITE                        0xa
-#define GEN75_MSG_DP_DC0_DWORD_SCATTERED_WRITE                 0xb
-#define GEN75_MSG_DP_DC0_BYTE_SCATTERED_WRITE                  0xc
-#define GEN75_MSG_DP_DC1_UNTYPED_SURFACE_READ                  0x1
-#define GEN75_MSG_DP_DC1_UNTYPED_ATOMIC_OP                     0x2
-#define GEN75_MSG_DP_DC1_UNTYPED_ATOMIC_OP_SIMD4X2             0x3
-#define GEN75_MSG_DP_DC1_MEDIA_BLOCK_READ                      0x4
-#define GEN75_MSG_DP_DC1_TYPED_SURFACE_READ                    0x5
-#define GEN75_MSG_DP_DC1_TYPED_ATOMIC_OP                       0x6
-#define GEN75_MSG_DP_DC1_TYPED_ATOMIC_OP_SIMD4X2               0x7
-#define GEN75_MSG_DP_DC1_UNTYPED_SURFACE_WRITE                 0x9
-#define GEN75_MSG_DP_DC1_MEDIA_BLOCK_WRITE                     0xa
-#define GEN75_MSG_DP_DC1_ATOMIC_COUNTER_OP                     0xb
-#define GEN75_MSG_DP_DC1_ATOMIC_COUNTER_OP_SIMD4X2             0xc
-#define GEN75_MSG_DP_DC1_TYPED_SURFACE_WRITE                   0xd
-#define GEN7_MSG_DP_AOP_CMPWR8B                                        0x0
-#define GEN7_MSG_DP_AOP_AND                                    0x1
-#define GEN7_MSG_DP_AOP_OR                                     0x2
-#define GEN7_MSG_DP_AOP_XOR                                    0x3
-#define GEN7_MSG_DP_AOP_MOV                                    0x4
-#define GEN7_MSG_DP_AOP_INC                                    0x5
-#define GEN7_MSG_DP_AOP_DEC                                    0x6
-#define GEN7_MSG_DP_AOP_ADD                                    0x7
-#define GEN7_MSG_DP_AOP_SUB                                    0x8
-#define GEN7_MSG_DP_AOP_REVSUB                                 0x9
-#define GEN7_MSG_DP_AOP_IMAX                                   0xa
-#define GEN7_MSG_DP_AOP_IMIN                                   0xb
-#define GEN7_MSG_DP_AOP_UMAX                                   0xc
-#define GEN7_MSG_DP_AOP_UMIN                                   0xd
-#define GEN7_MSG_DP_AOP_CMPWR                                  0xe
-#define GEN7_MSG_DP_AOP_PREDEC                                 0xf
+enum gen_eu_urb_op {
+    GEN6_MSG_URB_WRITE                                       = 0x0,
+    GEN6_MSG_URB_FF_SYNC                                     = 0x1,
+    GEN7_MSG_URB_WRITE_HWORD                                 = 0x0,
+    GEN7_MSG_URB_WRITE_OWORD                                 = 0x1,
+    GEN7_MSG_URB_READ_HWORD                                  = 0x2,
+    GEN7_MSG_URB_READ_OWORD                                  = 0x3,
+    GEN7_MSG_URB_ATOMIC_MOV                                  = 0x4,
+    GEN7_MSG_URB_ATOMIC_INC                                  = 0x5,
+    GEN8_MSG_URB_SIMD8_WRITE                                 = 0x7,
+};
+
+enum gen_eu_pi_simd {
+    GEN7_MSG_PI_SIMD8                                        = 0x0,
+    GEN7_MSG_PI_SIMD16                                       = 0x1,
+};
+
+enum gen_eu_pi_op {
+    GEN7_MSG_PI_EVAL_SNAPPED_IMM                             = 0x0,
+    GEN7_MSG_PI_EVAL_SINDEX                                  = 0x1,
+    GEN7_MSG_PI_EVAL_CENTROID                                = 0x2,
+    GEN7_MSG_PI_EVAL_SNAPPED                                 = 0x3,
+};
+
+enum gen_eu_sampler_simd {
+    GEN6_MSG_SAMPLER_SIMD4X2                                 = 0x0,
+    GEN9_MSG_SAMPLER_SIMD8D                                  = 0x0,
+    GEN6_MSG_SAMPLER_SIMD8                                   = 0x1,
+    GEN6_MSG_SAMPLER_SIMD16                                  = 0x2,
+    GEN6_MSG_SAMPLER_SIMD32_64                               = 0x3,
+};
+
+enum gen_eu_sampler_op {
+    GEN6_MSG_SAMPLER_SAMPLE                                  = 0x0,
+    GEN6_MSG_SAMPLER_SAMPLE_B                                = 0x1,
+    GEN6_MSG_SAMPLER_SAMPLE_L                                = 0x2,
+    GEN6_MSG_SAMPLER_SAMPLE_C                                = 0x3,
+    GEN6_MSG_SAMPLER_SAMPLE_D                                = 0x4,
+    GEN6_MSG_SAMPLER_SAMPLE_B_C                                      = 0x5,
+    GEN6_MSG_SAMPLER_SAMPLE_L_C                                      = 0x6,
+    GEN6_MSG_SAMPLER_LD                                              = 0x7,
+    GEN6_MSG_SAMPLER_GATHER4                                 = 0x8,
+    GEN6_MSG_SAMPLER_LOD                                     = 0x9,
+    GEN6_MSG_SAMPLER_RESINFO                                 = 0xa,
+    GEN6_MSG_SAMPLER_SAMPLEINFO                                      = 0xb,
+    GEN7_MSG_SAMPLER_GATHER4_C                               = 0x10,
+    GEN7_MSG_SAMPLER_GATHER4_PO                                      = 0x11,
+    GEN7_MSG_SAMPLER_GATHER4_PO_C                            = 0x12,
+    GEN7_MSG_SAMPLER_SAMPLE_D_C                                      = 0x14,
+    GEN7_MSG_SAMPLER_SAMPLE_LZ                               = 0x18,
+    GEN7_MSG_SAMPLER_SAMPLE_C_LC                             = 0x19,
+    GEN7_MSG_SAMPLER_LD_LZ                                   = 0x1a,
+    GEN7_MSG_SAMPLER_LD_MCS                                  = 0x1d,
+    GEN7_MSG_SAMPLER_LD2DMS                                  = 0x1e,
+    GEN7_MSG_SAMPLER_LD2DSS                                  = 0x1f,
+};
+
+enum gen_eu_dp_op {
+    GEN6_MSG_DP_OWORD_BLOCK_READ                             = 0x0,
+    GEN6_MSG_DP_RT_UNORM_READ                                = 0x1,
+    GEN6_MSG_DP_OWORD_DUAL_BLOCK_READ                        = 0x2,
+    GEN6_MSG_DP_MEDIA_BLOCK_READ                             = 0x4,
+    GEN6_MSG_DP_UNALIGNED_OWORD_BLOCK_READ                   = 0x5,
+    GEN6_MSG_DP_DWORD_SCATTERED_READ                         = 0x6,
+    GEN6_MSG_DP_DWORD_ATOMIC_WRITE                           = 0x7,
+    GEN6_MSG_DP_OWORD_BLOCK_WRITE                            = 0x8,
+    GEN6_MSG_DP_OWORD_DUAL_BLOCK_WRITE                       = 0x9,
+    GEN6_MSG_DP_MEDIA_BLOCK_WRITE                            = 0xa,
+    GEN6_MSG_DP_DWORD_SCATTERED_WRITE                        = 0xb,
+    GEN6_MSG_DP_RT_WRITE                                     = 0xc,
+    GEN6_MSG_DP_SVB_WRITE                                    = 0xd,
+    GEN6_MSG_DP_RT_UNORM_WRITE                               = 0xe,
+    GEN7_MSG_DP_SAMPLER_UNALIGNED_OWORD_BLOCK_READ           = 0x1,
+    GEN7_MSG_DP_SAMPLER_MEDIA_BLOCK_READ                     = 0x4,
+    GEN7_MSG_DP_RC_MEDIA_BLOCK_READ                          = 0x4,
+    GEN7_MSG_DP_RC_TYPED_SURFACE_READ                        = 0x5,
+    GEN7_MSG_DP_RC_TYPED_ATOMIC_OP                           = 0x6,
+    GEN7_MSG_DP_RC_MEMORY_FENCE                                      = 0x7,
+    GEN7_MSG_DP_RC_MEDIA_BLOCK_WRITE                         = 0xa,
+    GEN7_MSG_DP_RC_RT_WRITE                                  = 0xc,
+    GEN7_MSG_DP_RC_TYPED_SURFACE_WRITE                       = 0xd,
+    GEN7_MSG_DP_CC_OWORD_BLOCK_READ                          = 0x0,
+    GEN7_MSG_DP_CC_UNALIGNED_OWORD_BLOCK_READ                = 0x1,
+    GEN7_MSG_DP_CC_OWORD_DUAL_BLOCK_READ                     = 0x2,
+    GEN7_MSG_DP_CC_DWORD_SCATTERED_READ                              = 0x3,
+    GEN7_MSG_DP_DC0_OWORD_BLOCK_READ                         = 0x0,
+    GEN7_MSG_DP_DC0_UNALIGNED_OWORD_BLOCK_READ               = 0x1,
+    GEN7_MSG_DP_DC0_OWORD_DUAL_BLOCK_READ                    = 0x2,
+    GEN7_MSG_DP_DC0_DWORD_SCATTERED_READ                     = 0x3,
+    GEN7_MSG_DP_DC0_BYTE_SCATTERED_READ                              = 0x4,
+    GEN7_MSG_DP_DC0_UNTYPED_SURFACE_READ                     = 0x5,
+    GEN7_MSG_DP_DC0_UNTYPED_ATOMIC_OP                        = 0x6,
+    GEN7_MSG_DP_DC0_MEMORY_FENCE                             = 0x7,
+    GEN7_MSG_DP_DC0_OWORD_BLOCK_WRITE                        = 0x8,
+    GEN7_MSG_DP_DC0_OWORD_DUAL_BLOCK_WRITE                   = 0xa,
+    GEN7_MSG_DP_DC0_DWORD_SCATTERED_WRITE                    = 0xb,
+    GEN7_MSG_DP_DC0_BYTE_SCATTERED_WRITE                     = 0xc,
+    GEN7_MSG_DP_DC0_UNTYPED_SURFACE_WRITE                    = 0xd,
+    GEN75_MSG_DP_SAMPLER_READ_SURFACE_INFO                   = 0x0,
+    GEN75_MSG_DP_SAMPLER_UNALIGNED_OWORD_BLOCK_READ          = 0x1,
+    GEN75_MSG_DP_SAMPLER_MEDIA_BLOCK_READ                    = 0x4,
+    GEN75_MSG_DP_RC_MEDIA_BLOCK_READ                         = 0x4,
+    GEN75_MSG_DP_RC_MEMORY_FENCE                             = 0x7,
+    GEN75_MSG_DP_RC_MEDIA_BLOCK_WRITE                        = 0xa,
+    GEN75_MSG_DP_RC_RT_WRITE                                 = 0xc,
+    GEN75_MSG_DP_CC_OWORD_BLOCK_READ                         = 0x0,
+    GEN75_MSG_DP_CC_UNALIGNED_OWORD_BLOCK_READ               = 0x1,
+    GEN75_MSG_DP_CC_OWORD_DUAL_BLOCK_READ                    = 0x2,
+    GEN75_MSG_DP_CC_DWORD_SCATTERED_READ                     = 0x3,
+    GEN75_MSG_DP_DC0_OWORD_BLOCK_READ                        = 0x0,
+    GEN75_MSG_DP_DC0_UNALIGNED_OWORD_BLOCK_READ                      = 0x1,
+    GEN75_MSG_DP_DC0_OWORD_DUAL_BLOCK_READ                   = 0x2,
+    GEN75_MSG_DP_DC0_DWORD_SCATTERED_READ                    = 0x3,
+    GEN75_MSG_DP_DC0_BYTE_SCATTERED_READ                     = 0x4,
+    GEN75_MSG_DP_DC0_MEMORY_FENCE                            = 0x7,
+    GEN75_MSG_DP_DC0_OWORD_BLOCK_WRITE                       = 0x8,
+    GEN75_MSG_DP_DC0_OWORD_DUAL_BLOCK_WRITE                  = 0xa,
+    GEN75_MSG_DP_DC0_DWORD_SCATTERED_WRITE                   = 0xb,
+    GEN75_MSG_DP_DC0_BYTE_SCATTERED_WRITE                    = 0xc,
+    GEN75_MSG_DP_DC1_UNTYPED_SURFACE_READ                    = 0x1,
+    GEN75_MSG_DP_DC1_UNTYPED_ATOMIC_OP                       = 0x2,
+    GEN75_MSG_DP_DC1_UNTYPED_ATOMIC_OP_SIMD4X2               = 0x3,
+    GEN75_MSG_DP_DC1_MEDIA_BLOCK_READ                        = 0x4,
+    GEN75_MSG_DP_DC1_TYPED_SURFACE_READ                              = 0x5,
+    GEN75_MSG_DP_DC1_TYPED_ATOMIC_OP                         = 0x6,
+    GEN75_MSG_DP_DC1_TYPED_ATOMIC_OP_SIMD4X2                 = 0x7,
+    GEN75_MSG_DP_DC1_UNTYPED_SURFACE_WRITE                   = 0x9,
+    GEN75_MSG_DP_DC1_MEDIA_BLOCK_WRITE                       = 0xa,
+    GEN75_MSG_DP_DC1_ATOMIC_COUNTER_OP                       = 0xb,
+    GEN75_MSG_DP_DC1_ATOMIC_COUNTER_OP_SIMD4X2               = 0xc,
+    GEN75_MSG_DP_DC1_TYPED_SURFACE_WRITE                     = 0xd,
+};
+
+enum gen_eu_dp_aop {
+    GEN7_MSG_DP_AOP_CMPWR8B                                  = 0x0,
+    GEN7_MSG_DP_AOP_AND                                              = 0x1,
+    GEN7_MSG_DP_AOP_OR                                       = 0x2,
+    GEN7_MSG_DP_AOP_XOR                                              = 0x3,
+    GEN7_MSG_DP_AOP_MOV                                              = 0x4,
+    GEN7_MSG_DP_AOP_INC                                              = 0x5,
+    GEN7_MSG_DP_AOP_DEC                                              = 0x6,
+    GEN7_MSG_DP_AOP_ADD                                              = 0x7,
+    GEN7_MSG_DP_AOP_SUB                                              = 0x8,
+    GEN7_MSG_DP_AOP_REVSUB                                   = 0x9,
+    GEN7_MSG_DP_AOP_IMAX                                     = 0xa,
+    GEN7_MSG_DP_AOP_IMIN                                     = 0xb,
+    GEN7_MSG_DP_AOP_UMAX                                     = 0xc,
+    GEN7_MSG_DP_AOP_UMIN                                     = 0xd,
+    GEN7_MSG_DP_AOP_CMPWR                                    = 0xe,
+    GEN7_MSG_DP_AOP_PREDEC                                   = 0xf,
+};
+
 #define GEN6_MSG_EOT                                           (0x1 << 31)
 #define GEN6_MSG_MLEN__MASK                                    0x1e000000
 #define GEN6_MSG_MLEN__SHIFT                                   25
index 7995869..24d726a 100644 (file)
@@ -32,39 +32,45 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */
 
 
-#define GEN75_MI_ALU_NOOP                                      0x0
-#define GEN75_MI_ALU_LOAD                                      0x80
-#define GEN75_MI_ALU_LOADINV                                   0x480
-#define GEN75_MI_ALU_LOAD0                                     0x81
-#define GEN75_MI_ALU_LOAD1                                     0x481
-#define GEN75_MI_ALU_ADD                                       0x100
-#define GEN75_MI_ALU_SUB                                       0x101
-#define GEN75_MI_ALU_AND                                       0x102
-#define GEN75_MI_ALU_OR                                                0x103
-#define GEN75_MI_ALU_XOR                                       0x104
-#define GEN75_MI_ALU_STORE                                     0x180
-#define GEN75_MI_ALU_STOREINV                                  0x580
-#define GEN75_MI_ALU_R0                                                0x0
-#define GEN75_MI_ALU_R1                                                0x1
-#define GEN75_MI_ALU_R2                                                0x2
-#define GEN75_MI_ALU_R3                                                0x3
-#define GEN75_MI_ALU_R4                                                0x4
-#define GEN75_MI_ALU_R5                                                0x5
-#define GEN75_MI_ALU_R6                                                0x6
-#define GEN75_MI_ALU_R7                                                0x7
-#define GEN75_MI_ALU_R8                                                0x8
-#define GEN75_MI_ALU_R9                                                0x9
-#define GEN75_MI_ALU_R10                                       0xa
-#define GEN75_MI_ALU_R11                                       0xb
-#define GEN75_MI_ALU_R12                                       0xc
-#define GEN75_MI_ALU_R13                                       0xd
-#define GEN75_MI_ALU_R14                                       0xe
-#define GEN75_MI_ALU_R15                                       0xf
-#define GEN75_MI_ALU_SRCA                                      0x20
-#define GEN75_MI_ALU_SRCB                                      0x21
-#define GEN75_MI_ALU_ACCU                                      0x31
-#define GEN75_MI_ALU_ZF                                                0x32
-#define GEN75_MI_ALU_CF                                                0x33
+enum gen_mi_alu_opcode {
+    GEN75_MI_ALU_NOOP                                        = 0x0,
+    GEN75_MI_ALU_LOAD                                        = 0x80,
+    GEN75_MI_ALU_LOADINV                                     = 0x480,
+    GEN75_MI_ALU_LOAD0                                       = 0x81,
+    GEN75_MI_ALU_LOAD1                                       = 0x481,
+    GEN75_MI_ALU_ADD                                         = 0x100,
+    GEN75_MI_ALU_SUB                                         = 0x101,
+    GEN75_MI_ALU_AND                                         = 0x102,
+    GEN75_MI_ALU_OR                                          = 0x103,
+    GEN75_MI_ALU_XOR                                         = 0x104,
+    GEN75_MI_ALU_STORE                                       = 0x180,
+    GEN75_MI_ALU_STOREINV                                    = 0x580,
+};
+
+enum gen_mi_alu_operand {
+    GEN75_MI_ALU_R0                                          = 0x0,
+    GEN75_MI_ALU_R1                                          = 0x1,
+    GEN75_MI_ALU_R2                                          = 0x2,
+    GEN75_MI_ALU_R3                                          = 0x3,
+    GEN75_MI_ALU_R4                                          = 0x4,
+    GEN75_MI_ALU_R5                                          = 0x5,
+    GEN75_MI_ALU_R6                                          = 0x6,
+    GEN75_MI_ALU_R7                                          = 0x7,
+    GEN75_MI_ALU_R8                                          = 0x8,
+    GEN75_MI_ALU_R9                                          = 0x9,
+    GEN75_MI_ALU_R10                                         = 0xa,
+    GEN75_MI_ALU_R11                                         = 0xb,
+    GEN75_MI_ALU_R12                                         = 0xc,
+    GEN75_MI_ALU_R13                                         = 0xd,
+    GEN75_MI_ALU_R14                                         = 0xe,
+    GEN75_MI_ALU_R15                                         = 0xf,
+    GEN75_MI_ALU_SRCA                                        = 0x20,
+    GEN75_MI_ALU_SRCB                                        = 0x21,
+    GEN75_MI_ALU_ACCU                                        = 0x31,
+    GEN75_MI_ALU_ZF                                          = 0x32,
+    GEN75_MI_ALU_CF                                          = 0x33,
+};
+
 #define GEN6_MI_TYPE__MASK                                     0xe0000000
 #define GEN6_MI_TYPE__SHIFT                                    29
 #define GEN6_MI_TYPE_MI                                                (0x0 << 29)
index 8a535d8..2e86ba9 100644 (file)
@@ -139,37 +139,37 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define GEN6_MOCS_LLC__SHIFT                                   0
 #define GEN6_MOCS_LLC_PTE                                      0x0
 #define GEN6_MOCS_LLC_UC                                       0x1
-#define GEN6_MOCS_LLC_ON                                       0x2
+#define GEN6_MOCS_LLC_WB                                       0x2
 #define GEN7_MOCS_LLC__MASK                                    0x00000002
 #define GEN7_MOCS_LLC__SHIFT                                   1
 #define GEN7_MOCS_LLC_PTE                                      (0x0 << 1)
-#define GEN7_MOCS_LLC_ON                                       (0x1 << 1)
+#define GEN7_MOCS_LLC_WB                                       (0x1 << 1)
 #define GEN75_MOCS_LLC__MASK                                   0x00000006
 #define GEN75_MOCS_LLC__SHIFT                                  1
 #define GEN75_MOCS_LLC_PTE                                     (0x0 << 1)
 #define GEN75_MOCS_LLC_UC                                      (0x1 << 1)
-#define GEN75_MOCS_LLC_ON                                      (0x2 << 1)
+#define GEN75_MOCS_LLC_WB                                      (0x2 << 1)
 #define GEN75_MOCS_LLC_ELLC                                    (0x3 << 1)
 #define GEN7_MOCS_L3__MASK                                     0x00000001
 #define GEN7_MOCS_L3__SHIFT                                    0
 #define GEN7_MOCS_L3_UC                                                0x0
-#define GEN7_MOCS_L3_ON                                                0x1
-#define GEN8_MOCS_LLC__MASK                                    0x00000060
-#define GEN8_MOCS_LLC__SHIFT                                   5
-#define GEN8_MOCS_LLC_PTE                                      (0x0 << 5)
-#define GEN8_MOCS_LLC_UC                                       (0x1 << 5)
-#define GEN8_MOCS_LLC_WT                                       (0x2 << 5)
-#define GEN8_MOCS_LLC_WB                                       (0x3 << 5)
-#define GEN8_MOCS_L3__MASK                                     0x00000018
-#define GEN8_MOCS_L3__SHIFT                                    3
-#define GEN8_MOCS_L3_ELLC_ONLY                                 (0x0 << 3)
-#define GEN8_MOCS_L3_LLC_ONLY                                  (0x1 << 3)
-#define GEN8_MOCS_L3_LLC                                       (0x2 << 3)
-#define GEN8_MOCS_L3_ON                                                (0x3 << 3)
+#define GEN7_MOCS_L3_WB                                                0x1
+#define GEN8_MOCS_MT__MASK                                     0x00000060
+#define GEN8_MOCS_MT__SHIFT                                    5
+#define GEN8_MOCS_MT_PTE                                       (0x0 << 5)
+#define GEN8_MOCS_MT_UC                                                (0x1 << 5)
+#define GEN8_MOCS_MT_WT                                                (0x2 << 5)
+#define GEN8_MOCS_MT_WB                                                (0x3 << 5)
+#define GEN8_MOCS_CT__MASK                                     0x00000018
+#define GEN8_MOCS_CT__SHIFT                                    3
+#define GEN8_MOCS_CT_ELLC                                      (0x0 << 3)
+#define GEN8_MOCS_CT_LLC_ONLY                                  (0x1 << 3)
+#define GEN8_MOCS_CT_LLC                                       (0x2 << 3)
+#define GEN8_MOCS_CT_L3                                                (0x3 << 3)
 #define GEN9_MOCS__MASK                                                0x0000007f
 #define GEN9_MOCS__SHIFT                                       0
-#define GEN9_MOCS_WT                                           0x5
-#define GEN9_MOCS_WB                                           0x9
+#define GEN9_MOCS_MT_WT_CT_L3                                  0x5
+#define GEN9_MOCS_MT_WB_CT_L3                                  0x9
 #define GEN6_SBA_ADDR__MASK                                    0xfffff000
 #define GEN6_SBA_ADDR__SHIFT                                   12
 #define GEN6_SBA_ADDR__SHR                                     12
index 9de3df6..d25542e 100644 (file)
@@ -32,85 +32,97 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */
 
 
-#define GEN6_3DPRIM_POINTLIST                                  0x1
-#define GEN6_3DPRIM_LINELIST                                   0x2
-#define GEN6_3DPRIM_LINESTRIP                                  0x3
-#define GEN6_3DPRIM_TRILIST                                    0x4
-#define GEN6_3DPRIM_TRISTRIP                                   0x5
-#define GEN6_3DPRIM_TRIFAN                                     0x6
-#define GEN6_3DPRIM_QUADLIST                                   0x7
-#define GEN6_3DPRIM_QUADSTRIP                                  0x8
-#define GEN6_3DPRIM_LINELIST_ADJ                               0x9
-#define GEN6_3DPRIM_LINESTRIP_ADJ                              0xa
-#define GEN6_3DPRIM_TRILIST_ADJ                                        0xb
-#define GEN6_3DPRIM_TRISTRIP_ADJ                               0xc
-#define GEN6_3DPRIM_TRISTRIP_REVERSE                           0xd
-#define GEN6_3DPRIM_POLYGON                                    0xe
-#define GEN6_3DPRIM_RECTLIST                                   0xf
-#define GEN6_3DPRIM_LINELOOP                                   0x10
-#define GEN6_3DPRIM_POINTLIST_BF                               0x11
-#define GEN6_3DPRIM_LINESTRIP_CONT                             0x12
-#define GEN6_3DPRIM_LINESTRIP_BF                               0x13
-#define GEN6_3DPRIM_LINESTRIP_CONT_BF                          0x14
-#define GEN6_3DPRIM_TRIFAN_NOSTIPPLE                           0x16
-#define GEN7_3DPRIM_PATCHLIST_1                                        0x20
-#define GEN7_3DPRIM_PATCHLIST_2                                        0x21
-#define GEN7_3DPRIM_PATCHLIST_3                                        0x22
-#define GEN7_3DPRIM_PATCHLIST_4                                        0x23
-#define GEN7_3DPRIM_PATCHLIST_5                                        0x24
-#define GEN7_3DPRIM_PATCHLIST_6                                        0x25
-#define GEN7_3DPRIM_PATCHLIST_7                                        0x26
-#define GEN7_3DPRIM_PATCHLIST_8                                        0x27
-#define GEN7_3DPRIM_PATCHLIST_9                                        0x28
-#define GEN7_3DPRIM_PATCHLIST_10                               0x29
-#define GEN7_3DPRIM_PATCHLIST_11                               0x2a
-#define GEN7_3DPRIM_PATCHLIST_12                               0x2b
-#define GEN7_3DPRIM_PATCHLIST_13                               0x2c
-#define GEN7_3DPRIM_PATCHLIST_14                               0x2d
-#define GEN7_3DPRIM_PATCHLIST_15                               0x2e
-#define GEN7_3DPRIM_PATCHLIST_16                               0x2f
-#define GEN7_3DPRIM_PATCHLIST_17                               0x30
-#define GEN7_3DPRIM_PATCHLIST_18                               0x31
-#define GEN7_3DPRIM_PATCHLIST_19                               0x32
-#define GEN7_3DPRIM_PATCHLIST_20                               0x33
-#define GEN7_3DPRIM_PATCHLIST_21                               0x34
-#define GEN7_3DPRIM_PATCHLIST_22                               0x35
-#define GEN7_3DPRIM_PATCHLIST_23                               0x36
-#define GEN7_3DPRIM_PATCHLIST_24                               0x37
-#define GEN7_3DPRIM_PATCHLIST_25                               0x38
-#define GEN7_3DPRIM_PATCHLIST_26                               0x39
-#define GEN7_3DPRIM_PATCHLIST_27                               0x3a
-#define GEN7_3DPRIM_PATCHLIST_28                               0x3b
-#define GEN7_3DPRIM_PATCHLIST_29                               0x3c
-#define GEN7_3DPRIM_PATCHLIST_30                               0x3d
-#define GEN7_3DPRIM_PATCHLIST_31                               0x3e
-#define GEN7_3DPRIM_PATCHLIST_32                               0x3f
-#define GEN6_ALIGNMENT_COLOR_CALC_STATE                                0x40
-#define GEN6_ALIGNMENT_DEPTH_STENCIL_STATE                     0x40
-#define GEN6_ALIGNMENT_BLEND_STATE                             0x40
-#define GEN6_ALIGNMENT_CLIP_VIEWPORT                           0x20
-#define GEN6_ALIGNMENT_SF_VIEWPORT                             0x20
-#define GEN7_ALIGNMENT_SF_CLIP_VIEWPORT                                0x40
-#define GEN6_ALIGNMENT_CC_VIEWPORT                             0x20
-#define GEN6_ALIGNMENT_SCISSOR_RECT                            0x20
-#define GEN6_ALIGNMENT_BINDING_TABLE_STATE                     0x20
-#define GEN6_ALIGNMENT_SAMPLER_BORDER_COLOR_STATE              0x20
-#define GEN8_ALIGNMENT_SAMPLER_BORDER_COLOR_STATE              0x40
-#define GEN6_ALIGNMENT_SAMPLER_STATE                           0x20
-#define GEN6_ALIGNMENT_SURFACE_STATE                           0x20
-#define GEN8_ALIGNMENT_SURFACE_STATE                           0x40
-#define GEN6_VFCOMP_NOSTORE                                    0x0
-#define GEN6_VFCOMP_STORE_SRC                                  0x1
-#define GEN6_VFCOMP_STORE_0                                    0x2
-#define GEN6_VFCOMP_STORE_1_FP                                 0x3
-#define GEN6_VFCOMP_STORE_1_INT                                        0x4
-#define GEN6_VFCOMP_STORE_VID                                  0x5
-#define GEN6_VFCOMP_STORE_IID                                  0x6
-#define GEN6_ZFORMAT_D32_FLOAT_S8X24_UINT                      0x0
-#define GEN6_ZFORMAT_D32_FLOAT                                 0x1
-#define GEN6_ZFORMAT_D24_UNORM_S8_UINT                         0x2
-#define GEN6_ZFORMAT_D24_UNORM_X8_UINT                         0x3
-#define GEN6_ZFORMAT_D16_UNORM                                 0x5
+enum gen_prim_type {
+    GEN6_3DPRIM_POINTLIST                                    = 0x1,
+    GEN6_3DPRIM_LINELIST                                     = 0x2,
+    GEN6_3DPRIM_LINESTRIP                                    = 0x3,
+    GEN6_3DPRIM_TRILIST                                              = 0x4,
+    GEN6_3DPRIM_TRISTRIP                                     = 0x5,
+    GEN6_3DPRIM_TRIFAN                                       = 0x6,
+    GEN6_3DPRIM_QUADLIST                                     = 0x7,
+    GEN6_3DPRIM_QUADSTRIP                                    = 0x8,
+    GEN6_3DPRIM_LINELIST_ADJ                                 = 0x9,
+    GEN6_3DPRIM_LINESTRIP_ADJ                                = 0xa,
+    GEN6_3DPRIM_TRILIST_ADJ                                  = 0xb,
+    GEN6_3DPRIM_TRISTRIP_ADJ                                 = 0xc,
+    GEN6_3DPRIM_TRISTRIP_REVERSE                             = 0xd,
+    GEN6_3DPRIM_POLYGON                                              = 0xe,
+    GEN6_3DPRIM_RECTLIST                                     = 0xf,
+    GEN6_3DPRIM_LINELOOP                                     = 0x10,
+    GEN6_3DPRIM_POINTLIST_BF                                 = 0x11,
+    GEN6_3DPRIM_LINESTRIP_CONT                               = 0x12,
+    GEN6_3DPRIM_LINESTRIP_BF                                 = 0x13,
+    GEN6_3DPRIM_LINESTRIP_CONT_BF                            = 0x14,
+    GEN6_3DPRIM_TRIFAN_NOSTIPPLE                             = 0x16,
+    GEN7_3DPRIM_PATCHLIST_1                                  = 0x20,
+    GEN7_3DPRIM_PATCHLIST_2                                  = 0x21,
+    GEN7_3DPRIM_PATCHLIST_3                                  = 0x22,
+    GEN7_3DPRIM_PATCHLIST_4                                  = 0x23,
+    GEN7_3DPRIM_PATCHLIST_5                                  = 0x24,
+    GEN7_3DPRIM_PATCHLIST_6                                  = 0x25,
+    GEN7_3DPRIM_PATCHLIST_7                                  = 0x26,
+    GEN7_3DPRIM_PATCHLIST_8                                  = 0x27,
+    GEN7_3DPRIM_PATCHLIST_9                                  = 0x28,
+    GEN7_3DPRIM_PATCHLIST_10                                 = 0x29,
+    GEN7_3DPRIM_PATCHLIST_11                                 = 0x2a,
+    GEN7_3DPRIM_PATCHLIST_12                                 = 0x2b,
+    GEN7_3DPRIM_PATCHLIST_13                                 = 0x2c,
+    GEN7_3DPRIM_PATCHLIST_14                                 = 0x2d,
+    GEN7_3DPRIM_PATCHLIST_15                                 = 0x2e,
+    GEN7_3DPRIM_PATCHLIST_16                                 = 0x2f,
+    GEN7_3DPRIM_PATCHLIST_17                                 = 0x30,
+    GEN7_3DPRIM_PATCHLIST_18                                 = 0x31,
+    GEN7_3DPRIM_PATCHLIST_19                                 = 0x32,
+    GEN7_3DPRIM_PATCHLIST_20                                 = 0x33,
+    GEN7_3DPRIM_PATCHLIST_21                                 = 0x34,
+    GEN7_3DPRIM_PATCHLIST_22                                 = 0x35,
+    GEN7_3DPRIM_PATCHLIST_23                                 = 0x36,
+    GEN7_3DPRIM_PATCHLIST_24                                 = 0x37,
+    GEN7_3DPRIM_PATCHLIST_25                                 = 0x38,
+    GEN7_3DPRIM_PATCHLIST_26                                 = 0x39,
+    GEN7_3DPRIM_PATCHLIST_27                                 = 0x3a,
+    GEN7_3DPRIM_PATCHLIST_28                                 = 0x3b,
+    GEN7_3DPRIM_PATCHLIST_29                                 = 0x3c,
+    GEN7_3DPRIM_PATCHLIST_30                                 = 0x3d,
+    GEN7_3DPRIM_PATCHLIST_31                                 = 0x3e,
+    GEN7_3DPRIM_PATCHLIST_32                                 = 0x3f,
+};
+
+enum gen_state_alignment {
+    GEN6_ALIGNMENT_COLOR_CALC_STATE                          = 0x40,
+    GEN6_ALIGNMENT_DEPTH_STENCIL_STATE                       = 0x40,
+    GEN6_ALIGNMENT_BLEND_STATE                               = 0x40,
+    GEN6_ALIGNMENT_CLIP_VIEWPORT                             = 0x20,
+    GEN6_ALIGNMENT_SF_VIEWPORT                               = 0x20,
+    GEN7_ALIGNMENT_SF_CLIP_VIEWPORT                          = 0x40,
+    GEN6_ALIGNMENT_CC_VIEWPORT                               = 0x20,
+    GEN6_ALIGNMENT_SCISSOR_RECT                                      = 0x20,
+    GEN6_ALIGNMENT_BINDING_TABLE_STATE                       = 0x20,
+    GEN6_ALIGNMENT_SAMPLER_BORDER_COLOR_STATE                = 0x20,
+    GEN8_ALIGNMENT_SAMPLER_BORDER_COLOR_STATE                = 0x40,
+    GEN6_ALIGNMENT_SAMPLER_STATE                             = 0x20,
+    GEN6_ALIGNMENT_SURFACE_STATE                             = 0x20,
+    GEN8_ALIGNMENT_SURFACE_STATE                             = 0x40,
+};
+
+enum gen_vf_component {
+    GEN6_VFCOMP_NOSTORE                                              = 0x0,
+    GEN6_VFCOMP_STORE_SRC                                    = 0x1,
+    GEN6_VFCOMP_STORE_0                                              = 0x2,
+    GEN6_VFCOMP_STORE_1_FP                                   = 0x3,
+    GEN6_VFCOMP_STORE_1_INT                                  = 0x4,
+    GEN6_VFCOMP_STORE_VID                                    = 0x5,
+    GEN6_VFCOMP_STORE_IID                                    = 0x6,
+};
+
+enum gen_depth_format {
+    GEN6_ZFORMAT_D32_FLOAT_S8X24_UINT                        = 0x0,
+    GEN6_ZFORMAT_D32_FLOAT                                   = 0x1,
+    GEN6_ZFORMAT_D24_UNORM_S8_UINT                           = 0x2,
+    GEN6_ZFORMAT_D24_UNORM_X8_UINT                           = 0x3,
+    GEN6_ZFORMAT_D16_UNORM                                   = 0x5,
+};
+
 #define GEN6_INTERP_NONPERSPECTIVE_SAMPLE                      (0x1 << 5)
 #define GEN6_INTERP_NONPERSPECTIVE_CENTROID                    (0x1 << 4)
 #define GEN6_INTERP_NONPERSPECTIVE_PIXEL                       (0x1 << 3)
@@ -1730,10 +1742,16 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #define GEN6_HIZ_DW1_MOCS__MASK                                        0x1e000000
 #define GEN6_HIZ_DW1_MOCS__SHIFT                               25
+#define GEN8_HIZ_DW1_MOCS__MASK                                        0xfe000000
+#define GEN8_HIZ_DW1_MOCS__SHIFT                               25
 #define GEN6_HIZ_DW1_PITCH__MASK                               0x0001ffff
 #define GEN6_HIZ_DW1_PITCH__SHIFT                              0
 
 
+
+#define GEN8_HIZ_DW4_QPITCH__MASK                              0x00007fff
+#define GEN8_HIZ_DW4_QPITCH__SHIFT                             0
+
 #define GEN6_3DSTATE_CLEAR_PARAMS__SIZE                                3
 
 #define GEN6_CLEAR_PARAMS_DW0_VALID                            (0x1 << 15)
index 570ea6b..6d815be 100644 (file)
@@ -32,86 +32,116 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */
 
 
-#define GEN6_COMPAREFUNCTION_ALWAYS                            0x0
-#define GEN6_COMPAREFUNCTION_NEVER                             0x1
-#define GEN6_COMPAREFUNCTION_LESS                              0x2
-#define GEN6_COMPAREFUNCTION_EQUAL                             0x3
-#define GEN6_COMPAREFUNCTION_LEQUAL                            0x4
-#define GEN6_COMPAREFUNCTION_GREATER                           0x5
-#define GEN6_COMPAREFUNCTION_NOTEQUAL                          0x6
-#define GEN6_COMPAREFUNCTION_GEQUAL                            0x7
-#define GEN6_STENCILOP_KEEP                                    0x0
-#define GEN6_STENCILOP_ZERO                                    0x1
-#define GEN6_STENCILOP_REPLACE                                 0x2
-#define GEN6_STENCILOP_INCRSAT                                 0x3
-#define GEN6_STENCILOP_DECRSAT                                 0x4
-#define GEN6_STENCILOP_INCR                                    0x5
-#define GEN6_STENCILOP_DECR                                    0x6
-#define GEN6_STENCILOP_INVERT                                  0x7
-#define GEN6_BLENDFACTOR_ONE                                   0x1
-#define GEN6_BLENDFACTOR_SRC_COLOR                             0x2
-#define GEN6_BLENDFACTOR_SRC_ALPHA                             0x3
-#define GEN6_BLENDFACTOR_DST_ALPHA                             0x4
-#define GEN6_BLENDFACTOR_DST_COLOR                             0x5
-#define GEN6_BLENDFACTOR_SRC_ALPHA_SATURATE                    0x6
-#define GEN6_BLENDFACTOR_CONST_COLOR                           0x7
-#define GEN6_BLENDFACTOR_CONST_ALPHA                           0x8
-#define GEN6_BLENDFACTOR_SRC1_COLOR                            0x9
-#define GEN6_BLENDFACTOR_SRC1_ALPHA                            0xa
-#define GEN6_BLENDFACTOR_ZERO                                  0x11
-#define GEN6_BLENDFACTOR_INV_SRC_COLOR                         0x12
-#define GEN6_BLENDFACTOR_INV_SRC_ALPHA                         0x13
-#define GEN6_BLENDFACTOR_INV_DST_ALPHA                         0x14
-#define GEN6_BLENDFACTOR_INV_DST_COLOR                         0x15
-#define GEN6_BLENDFACTOR_INV_CONST_COLOR                       0x17
-#define GEN6_BLENDFACTOR_INV_CONST_ALPHA                       0x18
-#define GEN6_BLENDFACTOR_INV_SRC1_COLOR                                0x19
-#define GEN6_BLENDFACTOR_INV_SRC1_ALPHA                                0x1a
-#define GEN6_BLENDFUNCTION_ADD                                 0x0
-#define GEN6_BLENDFUNCTION_SUBTRACT                            0x1
-#define GEN6_BLENDFUNCTION_REVERSE_SUBTRACT                    0x2
-#define GEN6_BLENDFUNCTION_MIN                                 0x3
-#define GEN6_BLENDFUNCTION_MAX                                 0x4
-#define GEN6_LOGICOP_CLEAR                                     0x0
-#define GEN6_LOGICOP_NOR                                       0x1
-#define GEN6_LOGICOP_AND_INVERTED                              0x2
-#define GEN6_LOGICOP_COPY_INVERTED                             0x3
-#define GEN6_LOGICOP_AND_REVERSE                               0x4
-#define GEN6_LOGICOP_INVERT                                    0x5
-#define GEN6_LOGICOP_XOR                                       0x6
-#define GEN6_LOGICOP_NAND                                      0x7
-#define GEN6_LOGICOP_AND                                       0x8
-#define GEN6_LOGICOP_EQUIV                                     0x9
-#define GEN6_LOGICOP_NOOP                                      0xa
-#define GEN6_LOGICOP_OR_INVERTED                               0xb
-#define GEN6_LOGICOP_COPY                                      0xc
-#define GEN6_LOGICOP_OR_REVERSE                                        0xd
-#define GEN6_LOGICOP_OR                                                0xe
-#define GEN6_LOGICOP_SET                                       0xf
-#define GEN6_MIPFILTER_NONE                                    0x0
-#define GEN6_MIPFILTER_NEAREST                                 0x1
-#define GEN6_MIPFILTER_LINEAR                                  0x3
-#define GEN6_MAPFILTER_NEAREST                                 0x0
-#define GEN6_MAPFILTER_LINEAR                                  0x1
-#define GEN6_MAPFILTER_ANISOTROPIC                             0x2
-#define GEN6_MAPFILTER_MONO                                    0x6
-#define GEN6_ANISORATIO_2                                      0x0
-#define GEN6_ANISORATIO_4                                      0x1
-#define GEN6_ANISORATIO_6                                      0x2
-#define GEN6_ANISORATIO_8                                      0x3
-#define GEN6_ANISORATIO_10                                     0x4
-#define GEN6_ANISORATIO_12                                     0x5
-#define GEN6_ANISORATIO_14                                     0x6
-#define GEN6_ANISORATIO_16                                     0x7
-#define GEN6_TEXCOORDMODE_WRAP                                 0x0
-#define GEN6_TEXCOORDMODE_MIRROR                               0x1
-#define GEN6_TEXCOORDMODE_CLAMP                                        0x2
-#define GEN6_TEXCOORDMODE_CUBE                                 0x3
-#define GEN6_TEXCOORDMODE_CLAMP_BORDER                         0x4
-#define GEN6_TEXCOORDMODE_MIRROR_ONCE                          0x5
-#define GEN8_TEXCOORDMODE_HALF_BORDER                          0x6
-#define GEN6_KEYFILTER_KILL_ON_ANY_MATCH                       0x0
-#define GEN6_KEYFILTER_REPLACE_BLACK                           0x1
+enum gen_compare_function {
+    GEN6_COMPAREFUNCTION_ALWAYS                                      = 0x0,
+    GEN6_COMPAREFUNCTION_NEVER                               = 0x1,
+    GEN6_COMPAREFUNCTION_LESS                                = 0x2,
+    GEN6_COMPAREFUNCTION_EQUAL                               = 0x3,
+    GEN6_COMPAREFUNCTION_LEQUAL                                      = 0x4,
+    GEN6_COMPAREFUNCTION_GREATER                             = 0x5,
+    GEN6_COMPAREFUNCTION_NOTEQUAL                            = 0x6,
+    GEN6_COMPAREFUNCTION_GEQUAL                                      = 0x7,
+};
+
+enum gen_stencil_op {
+    GEN6_STENCILOP_KEEP                                              = 0x0,
+    GEN6_STENCILOP_ZERO                                              = 0x1,
+    GEN6_STENCILOP_REPLACE                                   = 0x2,
+    GEN6_STENCILOP_INCRSAT                                   = 0x3,
+    GEN6_STENCILOP_DECRSAT                                   = 0x4,
+    GEN6_STENCILOP_INCR                                              = 0x5,
+    GEN6_STENCILOP_DECR                                              = 0x6,
+    GEN6_STENCILOP_INVERT                                    = 0x7,
+};
+
+enum gen_blend_factor {
+    GEN6_BLENDFACTOR_ONE                                     = 0x1,
+    GEN6_BLENDFACTOR_SRC_COLOR                               = 0x2,
+    GEN6_BLENDFACTOR_SRC_ALPHA                               = 0x3,
+    GEN6_BLENDFACTOR_DST_ALPHA                               = 0x4,
+    GEN6_BLENDFACTOR_DST_COLOR                               = 0x5,
+    GEN6_BLENDFACTOR_SRC_ALPHA_SATURATE                              = 0x6,
+    GEN6_BLENDFACTOR_CONST_COLOR                             = 0x7,
+    GEN6_BLENDFACTOR_CONST_ALPHA                             = 0x8,
+    GEN6_BLENDFACTOR_SRC1_COLOR                                      = 0x9,
+    GEN6_BLENDFACTOR_SRC1_ALPHA                                      = 0xa,
+    GEN6_BLENDFACTOR_ZERO                                    = 0x11,
+    GEN6_BLENDFACTOR_INV_SRC_COLOR                           = 0x12,
+    GEN6_BLENDFACTOR_INV_SRC_ALPHA                           = 0x13,
+    GEN6_BLENDFACTOR_INV_DST_ALPHA                           = 0x14,
+    GEN6_BLENDFACTOR_INV_DST_COLOR                           = 0x15,
+    GEN6_BLENDFACTOR_INV_CONST_COLOR                         = 0x17,
+    GEN6_BLENDFACTOR_INV_CONST_ALPHA                         = 0x18,
+    GEN6_BLENDFACTOR_INV_SRC1_COLOR                          = 0x19,
+    GEN6_BLENDFACTOR_INV_SRC1_ALPHA                          = 0x1a,
+};
+
+enum gen_blend_function {
+    GEN6_BLENDFUNCTION_ADD                                   = 0x0,
+    GEN6_BLENDFUNCTION_SUBTRACT                                      = 0x1,
+    GEN6_BLENDFUNCTION_REVERSE_SUBTRACT                              = 0x2,
+    GEN6_BLENDFUNCTION_MIN                                   = 0x3,
+    GEN6_BLENDFUNCTION_MAX                                   = 0x4,
+};
+
+enum gen_logicop_function {
+    GEN6_LOGICOP_CLEAR                                       = 0x0,
+    GEN6_LOGICOP_NOR                                         = 0x1,
+    GEN6_LOGICOP_AND_INVERTED                                = 0x2,
+    GEN6_LOGICOP_COPY_INVERTED                               = 0x3,
+    GEN6_LOGICOP_AND_REVERSE                                 = 0x4,
+    GEN6_LOGICOP_INVERT                                              = 0x5,
+    GEN6_LOGICOP_XOR                                         = 0x6,
+    GEN6_LOGICOP_NAND                                        = 0x7,
+    GEN6_LOGICOP_AND                                         = 0x8,
+    GEN6_LOGICOP_EQUIV                                       = 0x9,
+    GEN6_LOGICOP_NOOP                                        = 0xa,
+    GEN6_LOGICOP_OR_INVERTED                                 = 0xb,
+    GEN6_LOGICOP_COPY                                        = 0xc,
+    GEN6_LOGICOP_OR_REVERSE                                  = 0xd,
+    GEN6_LOGICOP_OR                                          = 0xe,
+    GEN6_LOGICOP_SET                                         = 0xf,
+};
+
+enum gen_sampler_mip_filter {
+    GEN6_MIPFILTER_NONE                                              = 0x0,
+    GEN6_MIPFILTER_NEAREST                                   = 0x1,
+    GEN6_MIPFILTER_LINEAR                                    = 0x3,
+};
+
+enum gen_sampler_map_filter {
+    GEN6_MAPFILTER_NEAREST                                   = 0x0,
+    GEN6_MAPFILTER_LINEAR                                    = 0x1,
+    GEN6_MAPFILTER_ANISOTROPIC                               = 0x2,
+    GEN6_MAPFILTER_MONO                                              = 0x6,
+};
+
+enum gen_sampler_aniso_ratio {
+    GEN6_ANISORATIO_2                                        = 0x0,
+    GEN6_ANISORATIO_4                                        = 0x1,
+    GEN6_ANISORATIO_6                                        = 0x2,
+    GEN6_ANISORATIO_8                                        = 0x3,
+    GEN6_ANISORATIO_10                                       = 0x4,
+    GEN6_ANISORATIO_12                                       = 0x5,
+    GEN6_ANISORATIO_14                                       = 0x6,
+    GEN6_ANISORATIO_16                                       = 0x7,
+};
+
+enum gen_sampler_texcoord_mode {
+    GEN6_TEXCOORDMODE_WRAP                                   = 0x0,
+    GEN6_TEXCOORDMODE_MIRROR                                 = 0x1,
+    GEN6_TEXCOORDMODE_CLAMP                                  = 0x2,
+    GEN6_TEXCOORDMODE_CUBE                                   = 0x3,
+    GEN6_TEXCOORDMODE_CLAMP_BORDER                           = 0x4,
+    GEN6_TEXCOORDMODE_MIRROR_ONCE                            = 0x5,
+    GEN8_TEXCOORDMODE_HALF_BORDER                            = 0x6,
+};
+
+enum gen_sampler_key_filter {
+    GEN6_KEYFILTER_KILL_ON_ANY_MATCH                         = 0x0,
+    GEN6_KEYFILTER_REPLACE_BLACK                             = 0x1,
+};
+
 #define GEN6_COLOR_CALC_STATE__SIZE                            6
 
 #define GEN6_CC_DW0_STENCIL0_REF__MASK                         0xff000000
@@ -315,7 +345,64 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define GEN6_SCISSOR_DW1_MAX_X__MASK                           0x0000ffff
 #define GEN6_SCISSOR_DW1_MAX_X__SHIFT                          0
 
-#define GEN6_SAMPLER_BORDER_COLOR_STATE__SIZE                  12
+#define GEN6_SAMPLER_BORDER_COLOR_STATE__SIZE                  20
+
+#define GEN6_BORDER_COLOR_DW0_A__MASK                          0xff000000
+#define GEN6_BORDER_COLOR_DW0_A__SHIFT                         24
+#define GEN6_BORDER_COLOR_DW0_B__MASK                          0x00ff0000
+#define GEN6_BORDER_COLOR_DW0_B__SHIFT                         16
+#define GEN6_BORDER_COLOR_DW0_G__MASK                          0x0000ff00
+#define GEN6_BORDER_COLOR_DW0_G__SHIFT                         8
+#define GEN6_BORDER_COLOR_DW0_R__MASK                          0x000000ff
+#define GEN6_BORDER_COLOR_DW0_R__SHIFT                         0
+
+
+
+
+
+#define GEN6_BORDER_COLOR_DW5_G__MASK                          0xffff0000
+#define GEN6_BORDER_COLOR_DW5_G__SHIFT                         16
+#define GEN6_BORDER_COLOR_DW5_R__MASK                          0x0000ffff
+#define GEN6_BORDER_COLOR_DW5_R__SHIFT                         0
+
+#define GEN6_BORDER_COLOR_DW6_A__MASK                          0xffff0000
+#define GEN6_BORDER_COLOR_DW6_A__SHIFT                         16
+#define GEN6_BORDER_COLOR_DW6_B__MASK                          0x0000ffff
+#define GEN6_BORDER_COLOR_DW6_B__SHIFT                         0
+
+#define GEN6_BORDER_COLOR_DW7_G__MASK                          0xffff0000
+#define GEN6_BORDER_COLOR_DW7_G__SHIFT                         16
+#define GEN6_BORDER_COLOR_DW7_R__MASK                          0x0000ffff
+#define GEN6_BORDER_COLOR_DW7_R__SHIFT                         0
+
+#define GEN6_BORDER_COLOR_DW8_A__MASK                          0xffff0000
+#define GEN6_BORDER_COLOR_DW8_A__SHIFT                         16
+#define GEN6_BORDER_COLOR_DW8_B__MASK                          0x0000ffff
+#define GEN6_BORDER_COLOR_DW8_B__SHIFT                         0
+
+#define GEN6_BORDER_COLOR_DW9_G__MASK                          0xffff0000
+#define GEN6_BORDER_COLOR_DW9_G__SHIFT                         16
+#define GEN6_BORDER_COLOR_DW9_R__MASK                          0x0000ffff
+#define GEN6_BORDER_COLOR_DW9_R__SHIFT                         0
+
+#define GEN6_BORDER_COLOR_DW10_A__MASK                         0xffff0000
+#define GEN6_BORDER_COLOR_DW10_A__SHIFT                                16
+#define GEN6_BORDER_COLOR_DW10_B__MASK                         0x0000ffff
+#define GEN6_BORDER_COLOR_DW10_B__SHIFT                                0
+
+#define GEN6_BORDER_COLOR_DW11_A__MASK                         0xff000000
+#define GEN6_BORDER_COLOR_DW11_A__SHIFT                                24
+#define GEN6_BORDER_COLOR_DW11_B__MASK                         0x00ff0000
+#define GEN6_BORDER_COLOR_DW11_B__SHIFT                                16
+#define GEN6_BORDER_COLOR_DW11_G__MASK                         0x0000ff00
+#define GEN6_BORDER_COLOR_DW11_G__SHIFT                                8
+#define GEN6_BORDER_COLOR_DW11_R__MASK                         0x000000ff
+#define GEN6_BORDER_COLOR_DW11_R__SHIFT                                0
+
+
+
+
+
 
 
 
index f5ee27a..7c2349f 100644 (file)
@@ -32,246 +32,261 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */
 
 
-#define GEN6_FORMAT_R32G32B32A32_FLOAT                         0x0
-#define GEN6_FORMAT_R32G32B32A32_SINT                          0x1
-#define GEN6_FORMAT_R32G32B32A32_UINT                          0x2
-#define GEN6_FORMAT_R32G32B32A32_UNORM                         0x3
-#define GEN6_FORMAT_R32G32B32A32_SNORM                         0x4
-#define GEN6_FORMAT_R64G64_FLOAT                               0x5
-#define GEN6_FORMAT_R32G32B32X32_FLOAT                         0x6
-#define GEN6_FORMAT_R32G32B32A32_SSCALED                       0x7
-#define GEN6_FORMAT_R32G32B32A32_USCALED                       0x8
-#define GEN6_FORMAT_R32G32B32A32_SFIXED                                0x20
-#define GEN6_FORMAT_R64G64_PASSTHRU                            0x21
-#define GEN6_FORMAT_R32G32B32_FLOAT                            0x40
-#define GEN6_FORMAT_R32G32B32_SINT                             0x41
-#define GEN6_FORMAT_R32G32B32_UINT                             0x42
-#define GEN6_FORMAT_R32G32B32_UNORM                            0x43
-#define GEN6_FORMAT_R32G32B32_SNORM                            0x44
-#define GEN6_FORMAT_R32G32B32_SSCALED                          0x45
-#define GEN6_FORMAT_R32G32B32_USCALED                          0x46
-#define GEN6_FORMAT_R32G32B32_SFIXED                           0x50
-#define GEN6_FORMAT_R16G16B16A16_UNORM                         0x80
-#define GEN6_FORMAT_R16G16B16A16_SNORM                         0x81
-#define GEN6_FORMAT_R16G16B16A16_SINT                          0x82
-#define GEN6_FORMAT_R16G16B16A16_UINT                          0x83
-#define GEN6_FORMAT_R16G16B16A16_FLOAT                         0x84
-#define GEN6_FORMAT_R32G32_FLOAT                               0x85
-#define GEN6_FORMAT_R32G32_SINT                                        0x86
-#define GEN6_FORMAT_R32G32_UINT                                        0x87
-#define GEN6_FORMAT_R32_FLOAT_X8X24_TYPELESS                   0x88
-#define GEN6_FORMAT_X32_TYPELESS_G8X24_UINT                    0x89
-#define GEN6_FORMAT_L32A32_FLOAT                               0x8a
-#define GEN6_FORMAT_R32G32_UNORM                               0x8b
-#define GEN6_FORMAT_R32G32_SNORM                               0x8c
-#define GEN6_FORMAT_R64_FLOAT                                  0x8d
-#define GEN6_FORMAT_R16G16B16X16_UNORM                         0x8e
-#define GEN6_FORMAT_R16G16B16X16_FLOAT                         0x8f
-#define GEN6_FORMAT_A32X32_FLOAT                               0x90
-#define GEN6_FORMAT_L32X32_FLOAT                               0x91
-#define GEN6_FORMAT_I32X32_FLOAT                               0x92
-#define GEN6_FORMAT_R16G16B16A16_SSCALED                       0x93
-#define GEN6_FORMAT_R16G16B16A16_USCALED                       0x94
-#define GEN6_FORMAT_R32G32_SSCALED                             0x95
-#define GEN6_FORMAT_R32G32_USCALED                             0x96
-#define GEN6_FORMAT_R32G32_SFIXED                              0xa0
-#define GEN6_FORMAT_R64_PASSTHRU                               0xa1
-#define GEN6_FORMAT_B8G8R8A8_UNORM                             0xc0
-#define GEN6_FORMAT_B8G8R8A8_UNORM_SRGB                                0xc1
-#define GEN6_FORMAT_R10G10B10A2_UNORM                          0xc2
-#define GEN6_FORMAT_R10G10B10A2_UNORM_SRGB                     0xc3
-#define GEN6_FORMAT_R10G10B10A2_UINT                           0xc4
-#define GEN6_FORMAT_R10G10B10_SNORM_A2_UNORM                   0xc5
-#define GEN6_FORMAT_R8G8B8A8_UNORM                             0xc7
-#define GEN6_FORMAT_R8G8B8A8_UNORM_SRGB                                0xc8
-#define GEN6_FORMAT_R8G8B8A8_SNORM                             0xc9
-#define GEN6_FORMAT_R8G8B8A8_SINT                              0xca
-#define GEN6_FORMAT_R8G8B8A8_UINT                              0xcb
-#define GEN6_FORMAT_R16G16_UNORM                               0xcc
-#define GEN6_FORMAT_R16G16_SNORM                               0xcd
-#define GEN6_FORMAT_R16G16_SINT                                        0xce
-#define GEN6_FORMAT_R16G16_UINT                                        0xcf
-#define GEN6_FORMAT_R16G16_FLOAT                               0xd0
-#define GEN6_FORMAT_B10G10R10A2_UNORM                          0xd1
-#define GEN6_FORMAT_B10G10R10A2_UNORM_SRGB                     0xd2
-#define GEN6_FORMAT_R11G11B10_FLOAT                            0xd3
-#define GEN6_FORMAT_R32_SINT                                   0xd6
-#define GEN6_FORMAT_R32_UINT                                   0xd7
-#define GEN6_FORMAT_R32_FLOAT                                  0xd8
-#define GEN6_FORMAT_R24_UNORM_X8_TYPELESS                      0xd9
-#define GEN6_FORMAT_X24_TYPELESS_G8_UINT                       0xda
-#define GEN6_FORMAT_L32_UNORM                                  0xdd
-#define GEN6_FORMAT_A32_UNORM                                  0xde
-#define GEN6_FORMAT_L16A16_UNORM                               0xdf
-#define GEN6_FORMAT_I24X8_UNORM                                        0xe0
-#define GEN6_FORMAT_L24X8_UNORM                                        0xe1
-#define GEN6_FORMAT_A24X8_UNORM                                        0xe2
-#define GEN6_FORMAT_I32_FLOAT                                  0xe3
-#define GEN6_FORMAT_L32_FLOAT                                  0xe4
-#define GEN6_FORMAT_A32_FLOAT                                  0xe5
-#define GEN6_FORMAT_X8B8_UNORM_G8R8_SNORM                      0xe6
-#define GEN6_FORMAT_A8X8_UNORM_G8R8_SNORM                      0xe7
-#define GEN6_FORMAT_B8X8_UNORM_G8R8_SNORM                      0xe8
-#define GEN6_FORMAT_B8G8R8X8_UNORM                             0xe9
-#define GEN6_FORMAT_B8G8R8X8_UNORM_SRGB                                0xea
-#define GEN6_FORMAT_R8G8B8X8_UNORM                             0xeb
-#define GEN6_FORMAT_R8G8B8X8_UNORM_SRGB                                0xec
-#define GEN6_FORMAT_R9G9B9E5_SHAREDEXP                         0xed
-#define GEN6_FORMAT_B10G10R10X2_UNORM                          0xee
-#define GEN6_FORMAT_L16A16_FLOAT                               0xf0
-#define GEN6_FORMAT_R32_UNORM                                  0xf1
-#define GEN6_FORMAT_R32_SNORM                                  0xf2
-#define GEN6_FORMAT_R10G10B10X2_USCALED                                0xf3
-#define GEN6_FORMAT_R8G8B8A8_SSCALED                           0xf4
-#define GEN6_FORMAT_R8G8B8A8_USCALED                           0xf5
-#define GEN6_FORMAT_R16G16_SSCALED                             0xf6
-#define GEN6_FORMAT_R16G16_USCALED                             0xf7
-#define GEN6_FORMAT_R32_SSCALED                                        0xf8
-#define GEN6_FORMAT_R32_USCALED                                        0xf9
-#define GEN6_FORMAT_B5G6R5_UNORM                               0x100
-#define GEN6_FORMAT_B5G6R5_UNORM_SRGB                          0x101
-#define GEN6_FORMAT_B5G5R5A1_UNORM                             0x102
-#define GEN6_FORMAT_B5G5R5A1_UNORM_SRGB                                0x103
-#define GEN6_FORMAT_B4G4R4A4_UNORM                             0x104
-#define GEN6_FORMAT_B4G4R4A4_UNORM_SRGB                                0x105
-#define GEN6_FORMAT_R8G8_UNORM                                 0x106
-#define GEN6_FORMAT_R8G8_SNORM                                 0x107
-#define GEN6_FORMAT_R8G8_SINT                                  0x108
-#define GEN6_FORMAT_R8G8_UINT                                  0x109
-#define GEN6_FORMAT_R16_UNORM                                  0x10a
-#define GEN6_FORMAT_R16_SNORM                                  0x10b
-#define GEN6_FORMAT_R16_SINT                                   0x10c
-#define GEN6_FORMAT_R16_UINT                                   0x10d
-#define GEN6_FORMAT_R16_FLOAT                                  0x10e
-#define GEN6_FORMAT_A8P8_UNORM_PALETTE0                                0x10f
-#define GEN6_FORMAT_A8P8_UNORM_PALETTE1                                0x110
-#define GEN6_FORMAT_I16_UNORM                                  0x111
-#define GEN6_FORMAT_L16_UNORM                                  0x112
-#define GEN6_FORMAT_A16_UNORM                                  0x113
-#define GEN6_FORMAT_L8A8_UNORM                                 0x114
-#define GEN6_FORMAT_I16_FLOAT                                  0x115
-#define GEN6_FORMAT_L16_FLOAT                                  0x116
-#define GEN6_FORMAT_A16_FLOAT                                  0x117
-#define GEN6_FORMAT_L8A8_UNORM_SRGB                            0x118
-#define GEN6_FORMAT_R5G5_SNORM_B6_UNORM                                0x119
-#define GEN6_FORMAT_B5G5R5X1_UNORM                             0x11a
-#define GEN6_FORMAT_B5G5R5X1_UNORM_SRGB                                0x11b
-#define GEN6_FORMAT_R8G8_SSCALED                               0x11c
-#define GEN6_FORMAT_R8G8_USCALED                               0x11d
-#define GEN6_FORMAT_R16_SSCALED                                        0x11e
-#define GEN6_FORMAT_R16_USCALED                                        0x11f
-#define GEN6_FORMAT_P8A8_UNORM_PALETTE0                                0x122
-#define GEN6_FORMAT_P8A8_UNORM_PALETTE1                                0x123
-#define GEN6_FORMAT_A1B5G5R5_UNORM                             0x124
-#define GEN6_FORMAT_A4B4G4R4_UNORM                             0x125
-#define GEN6_FORMAT_L8A8_UINT                                  0x126
-#define GEN6_FORMAT_L8A8_SINT                                  0x127
-#define GEN6_FORMAT_R8_UNORM                                   0x140
-#define GEN6_FORMAT_R8_SNORM                                   0x141
-#define GEN6_FORMAT_R8_SINT                                    0x142
-#define GEN6_FORMAT_R8_UINT                                    0x143
-#define GEN6_FORMAT_A8_UNORM                                   0x144
-#define GEN6_FORMAT_I8_UNORM                                   0x145
-#define GEN6_FORMAT_L8_UNORM                                   0x146
-#define GEN6_FORMAT_P4A4_UNORM_PALETTE0                                0x147
-#define GEN6_FORMAT_A4P4_UNORM_PALETTE0                                0x148
-#define GEN6_FORMAT_R8_SSCALED                                 0x149
-#define GEN6_FORMAT_R8_USCALED                                 0x14a
-#define GEN6_FORMAT_P8_UNORM_PALETTE0                          0x14b
-#define GEN6_FORMAT_L8_UNORM_SRGB                              0x14c
-#define GEN6_FORMAT_P8_UNORM_PALETTE1                          0x14d
-#define GEN6_FORMAT_P4A4_UNORM_PALETTE1                                0x14e
-#define GEN6_FORMAT_A4P4_UNORM_PALETTE1                                0x14f
-#define GEN6_FORMAT_Y8_UNORM                                   0x150
-#define GEN6_FORMAT_L8_UINT                                    0x152
-#define GEN6_FORMAT_L8_SINT                                    0x153
-#define GEN6_FORMAT_I8_UINT                                    0x154
-#define GEN6_FORMAT_I8_SINT                                    0x155
-#define GEN6_FORMAT_DXT1_RGB_SRGB                              0x180
-#define GEN6_FORMAT_R1_UNORM                                   0x181
-#define GEN6_FORMAT_YCRCB_NORMAL                               0x182
-#define GEN6_FORMAT_YCRCB_SWAPUVY                              0x183
-#define GEN6_FORMAT_P2_UNORM_PALETTE0                          0x184
-#define GEN6_FORMAT_P2_UNORM_PALETTE1                          0x185
-#define GEN6_FORMAT_BC1_UNORM                                  0x186
-#define GEN6_FORMAT_BC2_UNORM                                  0x187
-#define GEN6_FORMAT_BC3_UNORM                                  0x188
-#define GEN6_FORMAT_BC4_UNORM                                  0x189
-#define GEN6_FORMAT_BC5_UNORM                                  0x18a
-#define GEN6_FORMAT_BC1_UNORM_SRGB                             0x18b
-#define GEN6_FORMAT_BC2_UNORM_SRGB                             0x18c
-#define GEN6_FORMAT_BC3_UNORM_SRGB                             0x18d
-#define GEN6_FORMAT_MONO8                                      0x18e
-#define GEN6_FORMAT_YCRCB_SWAPUV                               0x18f
-#define GEN6_FORMAT_YCRCB_SWAPY                                        0x190
-#define GEN6_FORMAT_DXT1_RGB                                   0x191
-#define GEN6_FORMAT_FXT1                                       0x192
-#define GEN6_FORMAT_R8G8B8_UNORM                               0x193
-#define GEN6_FORMAT_R8G8B8_SNORM                               0x194
-#define GEN6_FORMAT_R8G8B8_SSCALED                             0x195
-#define GEN6_FORMAT_R8G8B8_USCALED                             0x196
-#define GEN6_FORMAT_R64G64B64A64_FLOAT                         0x197
-#define GEN6_FORMAT_R64G64B64_FLOAT                            0x198
-#define GEN6_FORMAT_BC4_SNORM                                  0x199
-#define GEN6_FORMAT_BC5_SNORM                                  0x19a
-#define GEN6_FORMAT_R16G16B16_FLOAT                            0x19b
-#define GEN6_FORMAT_R16G16B16_UNORM                            0x19c
-#define GEN6_FORMAT_R16G16B16_SNORM                            0x19d
-#define GEN6_FORMAT_R16G16B16_SSCALED                          0x19e
-#define GEN6_FORMAT_R16G16B16_USCALED                          0x19f
-#define GEN6_FORMAT_BC6H_SF16                                  0x1a1
-#define GEN6_FORMAT_BC7_UNORM                                  0x1a2
-#define GEN6_FORMAT_BC7_UNORM_SRGB                             0x1a3
-#define GEN6_FORMAT_BC6H_UF16                                  0x1a4
-#define GEN6_FORMAT_PLANAR_420_8                               0x1a5
-#define GEN6_FORMAT_R8G8B8_UNORM_SRGB                          0x1a8
-#define GEN6_FORMAT_ETC1_RGB8                                  0x1a9
-#define GEN6_FORMAT_ETC2_RGB8                                  0x1aa
-#define GEN6_FORMAT_EAC_R11                                    0x1ab
-#define GEN6_FORMAT_EAC_RG11                                   0x1ac
-#define GEN6_FORMAT_EAC_SIGNED_R11                             0x1ad
-#define GEN6_FORMAT_EAC_SIGNED_RG11                            0x1ae
-#define GEN6_FORMAT_ETC2_SRGB8                                 0x1af
-#define GEN6_FORMAT_R16G16B16_UINT                             0x1b0
-#define GEN6_FORMAT_R16G16B16_SINT                             0x1b1
-#define GEN6_FORMAT_R32_SFIXED                                 0x1b2
-#define GEN6_FORMAT_R10G10B10A2_SNORM                          0x1b3
-#define GEN6_FORMAT_R10G10B10A2_USCALED                                0x1b4
-#define GEN6_FORMAT_R10G10B10A2_SSCALED                                0x1b5
-#define GEN6_FORMAT_R10G10B10A2_SINT                           0x1b6
-#define GEN6_FORMAT_B10G10R10A2_SNORM                          0x1b7
-#define GEN6_FORMAT_B10G10R10A2_USCALED                                0x1b8
-#define GEN6_FORMAT_B10G10R10A2_SSCALED                                0x1b9
-#define GEN6_FORMAT_B10G10R10A2_UINT                           0x1ba
-#define GEN6_FORMAT_B10G10R10A2_SINT                           0x1bb
-#define GEN6_FORMAT_R64G64B64A64_PASSTHRU                      0x1bc
-#define GEN6_FORMAT_R64G64B64_PASSTHRU                         0x1bd
-#define GEN6_FORMAT_ETC2_RGB8_PTA                              0x1c0
-#define GEN6_FORMAT_ETC2_SRGB8_PTA                             0x1c1
-#define GEN6_FORMAT_ETC2_EAC_RGBA8                             0x1c2
-#define GEN6_FORMAT_ETC2_EAC_SRGB8_A8                          0x1c3
-#define GEN6_FORMAT_R8G8B8_UINT                                        0x1c8
-#define GEN6_FORMAT_R8G8B8_SINT                                        0x1c9
-#define GEN6_FORMAT_RAW                                                0x1ff
-#define GEN6_SURFTYPE_1D                                       0x0
-#define GEN6_SURFTYPE_2D                                       0x1
-#define GEN6_SURFTYPE_3D                                       0x2
-#define GEN6_SURFTYPE_CUBE                                     0x3
-#define GEN6_SURFTYPE_BUFFER                                   0x4
-#define GEN7_SURFTYPE_STRBUF                                   0x5
-#define GEN6_SURFTYPE_NULL                                     0x7
-#define GEN6_TILING_NONE                                       0x0
-#define GEN8_TILING_W                                          0x1
-#define GEN6_TILING_X                                          0x2
-#define GEN6_TILING_Y                                          0x3
-#define GEN7_CLEAR_COLOR_ZERO                                  0x0
-#define GEN7_CLEAR_COLOR_ONE                                   0x1
-#define GEN75_SCS_ZERO                                         0x0
-#define GEN75_SCS_ONE                                          0x1
-#define GEN75_SCS_RED                                          0x4
-#define GEN75_SCS_GREEN                                                0x5
-#define GEN75_SCS_BLUE                                         0x6
-#define GEN75_SCS_ALPHA                                                0x7
+enum gen_surface_format {
+    GEN6_FORMAT_R32G32B32A32_FLOAT                           = 0x0,
+    GEN6_FORMAT_R32G32B32A32_SINT                            = 0x1,
+    GEN6_FORMAT_R32G32B32A32_UINT                            = 0x2,
+    GEN6_FORMAT_R32G32B32A32_UNORM                           = 0x3,
+    GEN6_FORMAT_R32G32B32A32_SNORM                           = 0x4,
+    GEN6_FORMAT_R64G64_FLOAT                                 = 0x5,
+    GEN6_FORMAT_R32G32B32X32_FLOAT                           = 0x6,
+    GEN6_FORMAT_R32G32B32A32_SSCALED                         = 0x7,
+    GEN6_FORMAT_R32G32B32A32_USCALED                         = 0x8,
+    GEN6_FORMAT_R32G32B32A32_SFIXED                          = 0x20,
+    GEN6_FORMAT_R64G64_PASSTHRU                                      = 0x21,
+    GEN6_FORMAT_R32G32B32_FLOAT                                      = 0x40,
+    GEN6_FORMAT_R32G32B32_SINT                               = 0x41,
+    GEN6_FORMAT_R32G32B32_UINT                               = 0x42,
+    GEN6_FORMAT_R32G32B32_UNORM                                      = 0x43,
+    GEN6_FORMAT_R32G32B32_SNORM                                      = 0x44,
+    GEN6_FORMAT_R32G32B32_SSCALED                            = 0x45,
+    GEN6_FORMAT_R32G32B32_USCALED                            = 0x46,
+    GEN6_FORMAT_R32G32B32_SFIXED                             = 0x50,
+    GEN6_FORMAT_R16G16B16A16_UNORM                           = 0x80,
+    GEN6_FORMAT_R16G16B16A16_SNORM                           = 0x81,
+    GEN6_FORMAT_R16G16B16A16_SINT                            = 0x82,
+    GEN6_FORMAT_R16G16B16A16_UINT                            = 0x83,
+    GEN6_FORMAT_R16G16B16A16_FLOAT                           = 0x84,
+    GEN6_FORMAT_R32G32_FLOAT                                 = 0x85,
+    GEN6_FORMAT_R32G32_SINT                                  = 0x86,
+    GEN6_FORMAT_R32G32_UINT                                  = 0x87,
+    GEN6_FORMAT_R32_FLOAT_X8X24_TYPELESS                     = 0x88,
+    GEN6_FORMAT_X32_TYPELESS_G8X24_UINT                              = 0x89,
+    GEN6_FORMAT_L32A32_FLOAT                                 = 0x8a,
+    GEN6_FORMAT_R32G32_UNORM                                 = 0x8b,
+    GEN6_FORMAT_R32G32_SNORM                                 = 0x8c,
+    GEN6_FORMAT_R64_FLOAT                                    = 0x8d,
+    GEN6_FORMAT_R16G16B16X16_UNORM                           = 0x8e,
+    GEN6_FORMAT_R16G16B16X16_FLOAT                           = 0x8f,
+    GEN6_FORMAT_A32X32_FLOAT                                 = 0x90,
+    GEN6_FORMAT_L32X32_FLOAT                                 = 0x91,
+    GEN6_FORMAT_I32X32_FLOAT                                 = 0x92,
+    GEN6_FORMAT_R16G16B16A16_SSCALED                         = 0x93,
+    GEN6_FORMAT_R16G16B16A16_USCALED                         = 0x94,
+    GEN6_FORMAT_R32G32_SSCALED                               = 0x95,
+    GEN6_FORMAT_R32G32_USCALED                               = 0x96,
+    GEN6_FORMAT_R32G32_SFIXED                                = 0xa0,
+    GEN6_FORMAT_R64_PASSTHRU                                 = 0xa1,
+    GEN6_FORMAT_B8G8R8A8_UNORM                               = 0xc0,
+    GEN6_FORMAT_B8G8R8A8_UNORM_SRGB                          = 0xc1,
+    GEN6_FORMAT_R10G10B10A2_UNORM                            = 0xc2,
+    GEN6_FORMAT_R10G10B10A2_UNORM_SRGB                       = 0xc3,
+    GEN6_FORMAT_R10G10B10A2_UINT                             = 0xc4,
+    GEN6_FORMAT_R10G10B10_SNORM_A2_UNORM                     = 0xc5,
+    GEN6_FORMAT_R8G8B8A8_UNORM                               = 0xc7,
+    GEN6_FORMAT_R8G8B8A8_UNORM_SRGB                          = 0xc8,
+    GEN6_FORMAT_R8G8B8A8_SNORM                               = 0xc9,
+    GEN6_FORMAT_R8G8B8A8_SINT                                = 0xca,
+    GEN6_FORMAT_R8G8B8A8_UINT                                = 0xcb,
+    GEN6_FORMAT_R16G16_UNORM                                 = 0xcc,
+    GEN6_FORMAT_R16G16_SNORM                                 = 0xcd,
+    GEN6_FORMAT_R16G16_SINT                                  = 0xce,
+    GEN6_FORMAT_R16G16_UINT                                  = 0xcf,
+    GEN6_FORMAT_R16G16_FLOAT                                 = 0xd0,
+    GEN6_FORMAT_B10G10R10A2_UNORM                            = 0xd1,
+    GEN6_FORMAT_B10G10R10A2_UNORM_SRGB                       = 0xd2,
+    GEN6_FORMAT_R11G11B10_FLOAT                                      = 0xd3,
+    GEN6_FORMAT_R32_SINT                                     = 0xd6,
+    GEN6_FORMAT_R32_UINT                                     = 0xd7,
+    GEN6_FORMAT_R32_FLOAT                                    = 0xd8,
+    GEN6_FORMAT_R24_UNORM_X8_TYPELESS                        = 0xd9,
+    GEN6_FORMAT_X24_TYPELESS_G8_UINT                         = 0xda,
+    GEN6_FORMAT_L32_UNORM                                    = 0xdd,
+    GEN6_FORMAT_A32_UNORM                                    = 0xde,
+    GEN6_FORMAT_L16A16_UNORM                                 = 0xdf,
+    GEN6_FORMAT_I24X8_UNORM                                  = 0xe0,
+    GEN6_FORMAT_L24X8_UNORM                                  = 0xe1,
+    GEN6_FORMAT_A24X8_UNORM                                  = 0xe2,
+    GEN6_FORMAT_I32_FLOAT                                    = 0xe3,
+    GEN6_FORMAT_L32_FLOAT                                    = 0xe4,
+    GEN6_FORMAT_A32_FLOAT                                    = 0xe5,
+    GEN6_FORMAT_X8B8_UNORM_G8R8_SNORM                        = 0xe6,
+    GEN6_FORMAT_A8X8_UNORM_G8R8_SNORM                        = 0xe7,
+    GEN6_FORMAT_B8X8_UNORM_G8R8_SNORM                        = 0xe8,
+    GEN6_FORMAT_B8G8R8X8_UNORM                               = 0xe9,
+    GEN6_FORMAT_B8G8R8X8_UNORM_SRGB                          = 0xea,
+    GEN6_FORMAT_R8G8B8X8_UNORM                               = 0xeb,
+    GEN6_FORMAT_R8G8B8X8_UNORM_SRGB                          = 0xec,
+    GEN6_FORMAT_R9G9B9E5_SHAREDEXP                           = 0xed,
+    GEN6_FORMAT_B10G10R10X2_UNORM                            = 0xee,
+    GEN6_FORMAT_L16A16_FLOAT                                 = 0xf0,
+    GEN6_FORMAT_R32_UNORM                                    = 0xf1,
+    GEN6_FORMAT_R32_SNORM                                    = 0xf2,
+    GEN6_FORMAT_R10G10B10X2_USCALED                          = 0xf3,
+    GEN6_FORMAT_R8G8B8A8_SSCALED                             = 0xf4,
+    GEN6_FORMAT_R8G8B8A8_USCALED                             = 0xf5,
+    GEN6_FORMAT_R16G16_SSCALED                               = 0xf6,
+    GEN6_FORMAT_R16G16_USCALED                               = 0xf7,
+    GEN6_FORMAT_R32_SSCALED                                  = 0xf8,
+    GEN6_FORMAT_R32_USCALED                                  = 0xf9,
+    GEN6_FORMAT_B5G6R5_UNORM                                 = 0x100,
+    GEN6_FORMAT_B5G6R5_UNORM_SRGB                            = 0x101,
+    GEN6_FORMAT_B5G5R5A1_UNORM                               = 0x102,
+    GEN6_FORMAT_B5G5R5A1_UNORM_SRGB                          = 0x103,
+    GEN6_FORMAT_B4G4R4A4_UNORM                               = 0x104,
+    GEN6_FORMAT_B4G4R4A4_UNORM_SRGB                          = 0x105,
+    GEN6_FORMAT_R8G8_UNORM                                   = 0x106,
+    GEN6_FORMAT_R8G8_SNORM                                   = 0x107,
+    GEN6_FORMAT_R8G8_SINT                                    = 0x108,
+    GEN6_FORMAT_R8G8_UINT                                    = 0x109,
+    GEN6_FORMAT_R16_UNORM                                    = 0x10a,
+    GEN6_FORMAT_R16_SNORM                                    = 0x10b,
+    GEN6_FORMAT_R16_SINT                                     = 0x10c,
+    GEN6_FORMAT_R16_UINT                                     = 0x10d,
+    GEN6_FORMAT_R16_FLOAT                                    = 0x10e,
+    GEN6_FORMAT_A8P8_UNORM_PALETTE0                          = 0x10f,
+    GEN6_FORMAT_A8P8_UNORM_PALETTE1                          = 0x110,
+    GEN6_FORMAT_I16_UNORM                                    = 0x111,
+    GEN6_FORMAT_L16_UNORM                                    = 0x112,
+    GEN6_FORMAT_A16_UNORM                                    = 0x113,
+    GEN6_FORMAT_L8A8_UNORM                                   = 0x114,
+    GEN6_FORMAT_I16_FLOAT                                    = 0x115,
+    GEN6_FORMAT_L16_FLOAT                                    = 0x116,
+    GEN6_FORMAT_A16_FLOAT                                    = 0x117,
+    GEN6_FORMAT_L8A8_UNORM_SRGB                                      = 0x118,
+    GEN6_FORMAT_R5G5_SNORM_B6_UNORM                          = 0x119,
+    GEN6_FORMAT_B5G5R5X1_UNORM                               = 0x11a,
+    GEN6_FORMAT_B5G5R5X1_UNORM_SRGB                          = 0x11b,
+    GEN6_FORMAT_R8G8_SSCALED                                 = 0x11c,
+    GEN6_FORMAT_R8G8_USCALED                                 = 0x11d,
+    GEN6_FORMAT_R16_SSCALED                                  = 0x11e,
+    GEN6_FORMAT_R16_USCALED                                  = 0x11f,
+    GEN6_FORMAT_P8A8_UNORM_PALETTE0                          = 0x122,
+    GEN6_FORMAT_P8A8_UNORM_PALETTE1                          = 0x123,
+    GEN6_FORMAT_A1B5G5R5_UNORM                               = 0x124,
+    GEN6_FORMAT_A4B4G4R4_UNORM                               = 0x125,
+    GEN6_FORMAT_L8A8_UINT                                    = 0x126,
+    GEN6_FORMAT_L8A8_SINT                                    = 0x127,
+    GEN6_FORMAT_R8_UNORM                                     = 0x140,
+    GEN6_FORMAT_R8_SNORM                                     = 0x141,
+    GEN6_FORMAT_R8_SINT                                              = 0x142,
+    GEN6_FORMAT_R8_UINT                                              = 0x143,
+    GEN6_FORMAT_A8_UNORM                                     = 0x144,
+    GEN6_FORMAT_I8_UNORM                                     = 0x145,
+    GEN6_FORMAT_L8_UNORM                                     = 0x146,
+    GEN6_FORMAT_P4A4_UNORM_PALETTE0                          = 0x147,
+    GEN6_FORMAT_A4P4_UNORM_PALETTE0                          = 0x148,
+    GEN6_FORMAT_R8_SSCALED                                   = 0x149,
+    GEN6_FORMAT_R8_USCALED                                   = 0x14a,
+    GEN6_FORMAT_P8_UNORM_PALETTE0                            = 0x14b,
+    GEN6_FORMAT_L8_UNORM_SRGB                                = 0x14c,
+    GEN6_FORMAT_P8_UNORM_PALETTE1                            = 0x14d,
+    GEN6_FORMAT_P4A4_UNORM_PALETTE1                          = 0x14e,
+    GEN6_FORMAT_A4P4_UNORM_PALETTE1                          = 0x14f,
+    GEN6_FORMAT_Y8_UNORM                                     = 0x150,
+    GEN6_FORMAT_L8_UINT                                              = 0x152,
+    GEN6_FORMAT_L8_SINT                                              = 0x153,
+    GEN6_FORMAT_I8_UINT                                              = 0x154,
+    GEN6_FORMAT_I8_SINT                                              = 0x155,
+    GEN6_FORMAT_DXT1_RGB_SRGB                                = 0x180,
+    GEN6_FORMAT_R1_UNORM                                     = 0x181,
+    GEN6_FORMAT_YCRCB_NORMAL                                 = 0x182,
+    GEN6_FORMAT_YCRCB_SWAPUVY                                = 0x183,
+    GEN6_FORMAT_P2_UNORM_PALETTE0                            = 0x184,
+    GEN6_FORMAT_P2_UNORM_PALETTE1                            = 0x185,
+    GEN6_FORMAT_BC1_UNORM                                    = 0x186,
+    GEN6_FORMAT_BC2_UNORM                                    = 0x187,
+    GEN6_FORMAT_BC3_UNORM                                    = 0x188,
+    GEN6_FORMAT_BC4_UNORM                                    = 0x189,
+    GEN6_FORMAT_BC5_UNORM                                    = 0x18a,
+    GEN6_FORMAT_BC1_UNORM_SRGB                               = 0x18b,
+    GEN6_FORMAT_BC2_UNORM_SRGB                               = 0x18c,
+    GEN6_FORMAT_BC3_UNORM_SRGB                               = 0x18d,
+    GEN6_FORMAT_MONO8                                        = 0x18e,
+    GEN6_FORMAT_YCRCB_SWAPUV                                 = 0x18f,
+    GEN6_FORMAT_YCRCB_SWAPY                                  = 0x190,
+    GEN6_FORMAT_DXT1_RGB                                     = 0x191,
+    GEN6_FORMAT_FXT1                                         = 0x192,
+    GEN6_FORMAT_R8G8B8_UNORM                                 = 0x193,
+    GEN6_FORMAT_R8G8B8_SNORM                                 = 0x194,
+    GEN6_FORMAT_R8G8B8_SSCALED                               = 0x195,
+    GEN6_FORMAT_R8G8B8_USCALED                               = 0x196,
+    GEN6_FORMAT_R64G64B64A64_FLOAT                           = 0x197,
+    GEN6_FORMAT_R64G64B64_FLOAT                                      = 0x198,
+    GEN6_FORMAT_BC4_SNORM                                    = 0x199,
+    GEN6_FORMAT_BC5_SNORM                                    = 0x19a,
+    GEN6_FORMAT_R16G16B16_FLOAT                                      = 0x19b,
+    GEN6_FORMAT_R16G16B16_UNORM                                      = 0x19c,
+    GEN6_FORMAT_R16G16B16_SNORM                                      = 0x19d,
+    GEN6_FORMAT_R16G16B16_SSCALED                            = 0x19e,
+    GEN6_FORMAT_R16G16B16_USCALED                            = 0x19f,
+    GEN6_FORMAT_BC6H_SF16                                    = 0x1a1,
+    GEN6_FORMAT_BC7_UNORM                                    = 0x1a2,
+    GEN6_FORMAT_BC7_UNORM_SRGB                               = 0x1a3,
+    GEN6_FORMAT_BC6H_UF16                                    = 0x1a4,
+    GEN6_FORMAT_PLANAR_420_8                                 = 0x1a5,
+    GEN6_FORMAT_R8G8B8_UNORM_SRGB                            = 0x1a8,
+    GEN6_FORMAT_ETC1_RGB8                                    = 0x1a9,
+    GEN6_FORMAT_ETC2_RGB8                                    = 0x1aa,
+    GEN6_FORMAT_EAC_R11                                              = 0x1ab,
+    GEN6_FORMAT_EAC_RG11                                     = 0x1ac,
+    GEN6_FORMAT_EAC_SIGNED_R11                               = 0x1ad,
+    GEN6_FORMAT_EAC_SIGNED_RG11                                      = 0x1ae,
+    GEN6_FORMAT_ETC2_SRGB8                                   = 0x1af,
+    GEN6_FORMAT_R16G16B16_UINT                               = 0x1b0,
+    GEN6_FORMAT_R16G16B16_SINT                               = 0x1b1,
+    GEN6_FORMAT_R32_SFIXED                                   = 0x1b2,
+    GEN6_FORMAT_R10G10B10A2_SNORM                            = 0x1b3,
+    GEN6_FORMAT_R10G10B10A2_USCALED                          = 0x1b4,
+    GEN6_FORMAT_R10G10B10A2_SSCALED                          = 0x1b5,
+    GEN6_FORMAT_R10G10B10A2_SINT                             = 0x1b6,
+    GEN6_FORMAT_B10G10R10A2_SNORM                            = 0x1b7,
+    GEN6_FORMAT_B10G10R10A2_USCALED                          = 0x1b8,
+    GEN6_FORMAT_B10G10R10A2_SSCALED                          = 0x1b9,
+    GEN6_FORMAT_B10G10R10A2_UINT                             = 0x1ba,
+    GEN6_FORMAT_B10G10R10A2_SINT                             = 0x1bb,
+    GEN6_FORMAT_R64G64B64A64_PASSTHRU                        = 0x1bc,
+    GEN6_FORMAT_R64G64B64_PASSTHRU                           = 0x1bd,
+    GEN6_FORMAT_ETC2_RGB8_PTA                                = 0x1c0,
+    GEN6_FORMAT_ETC2_SRGB8_PTA                               = 0x1c1,
+    GEN6_FORMAT_ETC2_EAC_RGBA8                               = 0x1c2,
+    GEN6_FORMAT_ETC2_EAC_SRGB8_A8                            = 0x1c3,
+    GEN6_FORMAT_R8G8B8_UINT                                  = 0x1c8,
+    GEN6_FORMAT_R8G8B8_SINT                                  = 0x1c9,
+    GEN6_FORMAT_RAW                                          = 0x1ff,
+};
+
+enum gen_surface_type {
+    GEN6_SURFTYPE_1D                                         = 0x0,
+    GEN6_SURFTYPE_2D                                         = 0x1,
+    GEN6_SURFTYPE_3D                                         = 0x2,
+    GEN6_SURFTYPE_CUBE                                       = 0x3,
+    GEN6_SURFTYPE_BUFFER                                     = 0x4,
+    GEN7_SURFTYPE_STRBUF                                     = 0x5,
+    GEN6_SURFTYPE_NULL                                       = 0x7,
+};
+
+enum gen_surface_tiling {
+    GEN6_TILING_NONE                                         = 0x0,
+    GEN8_TILING_W                                            = 0x1,
+    GEN6_TILING_X                                            = 0x2,
+    GEN6_TILING_Y                                            = 0x3,
+};
+
+enum gen_surface_clear_color {
+    GEN7_CLEAR_COLOR_ZERO                                    = 0x0,
+    GEN7_CLEAR_COLOR_ONE                                     = 0x1,
+};
+
+enum gen_surface_scs {
+    GEN75_SCS_ZERO                                           = 0x0,
+    GEN75_SCS_ONE                                            = 0x1,
+    GEN75_SCS_RED                                            = 0x4,
+    GEN75_SCS_GREEN                                          = 0x5,
+    GEN75_SCS_BLUE                                           = 0x6,
+    GEN75_SCS_ALPHA                                          = 0x7,
+};
+
 #define GEN6_SURFACE_STATE__SIZE                               16
 
 #define GEN6_SURFACE_DW0_TYPE__MASK                            0xe0000000