* cpux.h,decodex.c,modelx.c,semx-switch.c: Rebuild.
+1999-01-27 Doug Evans <devans@casey.cygnus.com>
+
+ * cpu.h,decode.c,model.c,sem-switch.c,sem.c: Rebuild.
+start-sanitize-m32rx
+ * cpux.h,decodex.c,modelx.c,semx-switch.c: Rebuild.
+end-sanitize-m32rx
+
+1999-01-15 Doug Evans <devans@casey.cygnus.com>
+
+ * decode.h,model.c: Regenerate.
+start-sanitize-m32rx
+ * decodex.h,modelx.c: Regenerate.
+end-sanitize-m32rx
+
1999-01-14 Doug Evans <devans@casey.cygnus.com>
start-sanitize-cygnus
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
+Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
This file is part of the GNU Simulators.
} MODEL_TEST_DATA;
union sem_fields {
- struct { /* empty format for unspecified field list */
+ struct { /* empty sformat for unspecified field list */
int empty;
} fmt_empty;
struct { /* e.g. add $dr,$sr */
unsigned char in_src2;
} fmt_cmpi;
struct { /* e.g. div $dr,$sr */
- SI * i_sr;
SI * i_dr;
- unsigned char in_sr;
+ SI * i_sr;
unsigned char in_dr;
+ unsigned char in_sr;
unsigned char out_dr;
} fmt_div;
struct { /* e.g. ld $dr,@$sr */
unsigned char out_dr;
} fmt_slli;
struct { /* e.g. st $src1,@$src2 */
- SI * i_src2;
SI * i_src1;
- unsigned char in_src2;
+ SI * i_src2;
unsigned char in_src1;
+ unsigned char in_src2;
} fmt_st;
struct { /* e.g. st $src1,@($slo16,$src2) */
INT f_simm16;
- SI * i_src2;
SI * i_src1;
- unsigned char in_src2;
+ SI * i_src2;
unsigned char in_src1;
+ unsigned char in_src2;
} fmt_st_d;
struct { /* e.g. stb $src1,@$src2 */
- SI * i_src2;
SI * i_src1;
- unsigned char in_src2;
+ SI * i_src2;
unsigned char in_src1;
+ unsigned char in_src2;
} fmt_stb;
struct { /* e.g. stb $src1,@($slo16,$src2) */
INT f_simm16;
- SI * i_src2;
SI * i_src1;
- unsigned char in_src2;
+ SI * i_src2;
unsigned char in_src1;
+ unsigned char in_src2;
} fmt_stb_d;
struct { /* e.g. sth $src1,@$src2 */
- SI * i_src2;
SI * i_src1;
- unsigned char in_src2;
+ SI * i_src2;
unsigned char in_src1;
+ unsigned char in_src2;
} fmt_sth;
struct { /* e.g. sth $src1,@($slo16,$src2) */
INT f_simm16;
- SI * i_src2;
SI * i_src1;
- unsigned char in_src2;
+ SI * i_src2;
unsigned char in_src1;
+ unsigned char in_src2;
} fmt_sth_d;
struct { /* e.g. st $src1,@+$src2 */
- SI * i_src2;
SI * i_src1;
- unsigned char in_src2;
+ SI * i_src2;
unsigned char in_src1;
+ unsigned char in_src2;
unsigned char out_src2;
} fmt_st_plus;
struct { /* e.g. unlock $src1,@$src2 */
- SI * i_src2;
SI * i_src1;
- unsigned char in_src2;
+ SI * i_src2;
unsigned char in_src1;
+ unsigned char in_src2;
} fmt_unlock;
/* cti insns, kept separately so addr_cache is in fixed place */
struct {
IADDR i_disp24;
} fmt_bc24;
struct { /* e.g. beq $src1,$src2,$disp16 */
+ IADDR i_disp16;
SI * i_src1;
SI * i_src2;
- IADDR i_disp16;
unsigned char in_src1;
unsigned char in_src2;
} fmt_beq;
struct { /* e.g. beqz $src2,$disp16 */
- SI * i_src2;
IADDR i_disp16;
+ SI * i_src2;
unsigned char in_src2;
} fmt_beqz;
struct { /* e.g. bl.s $disp8 */
/* The ARGBUF struct. */
struct argbuf {
/* These are the baseclass definitions. */
- PCADDR addr;
+ IADDR addr;
const IDESC *idesc;
char trace_p;
char profile_p;
/* Macros to simplify extraction, reading and semantic code.
These define and assign the local vars that contain the insn's fields. */
-#define EXTRACT_FMT_EMPTY_VARS \
+#define EXTRACT_IFMT_EMPTY_VARS \
/* Instruction fields. */ \
unsigned int length;
-#define EXTRACT_FMT_EMPTY_CODE \
+#define EXTRACT_IFMT_EMPTY_CODE \
length = 0; \
-#define EXTRACT_FMT_ADD_VARS \
+#define EXTRACT_IFMT_ADD_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_op2; \
UINT f_r2; \
unsigned int length;
-#define EXTRACT_FMT_ADD_CODE \
+#define EXTRACT_IFMT_ADD_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-#define EXTRACT_FMT_ADD3_VARS \
+#define EXTRACT_IFMT_ADD3_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_r2; \
INT f_simm16; \
unsigned int length;
-#define EXTRACT_FMT_ADD3_CODE \
+#define EXTRACT_IFMT_ADD3_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
-#define EXTRACT_FMT_AND3_VARS \
+#define EXTRACT_IFMT_AND3_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_r2; \
UINT f_uimm16; \
unsigned int length;
-#define EXTRACT_FMT_AND3_CODE \
+#define EXTRACT_IFMT_AND3_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
f_uimm16 = EXTRACT_UINT (insn, 32, 16, 16); \
-#define EXTRACT_FMT_OR3_VARS \
+#define EXTRACT_IFMT_OR3_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_r2; \
UINT f_uimm16; \
unsigned int length;
-#define EXTRACT_FMT_OR3_CODE \
+#define EXTRACT_IFMT_OR3_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
f_uimm16 = EXTRACT_UINT (insn, 32, 16, 16); \
-#define EXTRACT_FMT_ADDI_VARS \
+#define EXTRACT_IFMT_ADDI_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
INT f_simm8; \
unsigned int length;
-#define EXTRACT_FMT_ADDI_CODE \
+#define EXTRACT_IFMT_ADDI_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_simm8 = EXTRACT_INT (insn, 16, 8, 8); \
-#define EXTRACT_FMT_ADDV_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_ADDV_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_ADDV3_VARS \
+#define EXTRACT_IFMT_ADDV3_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_r2; \
INT f_simm16; \
unsigned int length;
-#define EXTRACT_FMT_ADDV3_CODE \
+#define EXTRACT_IFMT_ADDV3_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
-#define EXTRACT_FMT_ADDX_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_ADDX_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_BC8_VARS \
+#define EXTRACT_IFMT_BC8_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
SI f_disp8; \
unsigned int length;
-#define EXTRACT_FMT_BC8_CODE \
+#define EXTRACT_IFMT_BC8_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_disp8 = ((((EXTRACT_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); \
-#define EXTRACT_FMT_BC24_VARS \
+#define EXTRACT_IFMT_BC24_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
SI f_disp24; \
unsigned int length;
-#define EXTRACT_FMT_BC24_CODE \
+#define EXTRACT_IFMT_BC24_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_disp24 = ((((EXTRACT_INT (insn, 32, 8, 24)) << (2))) + (pc)); \
-#define EXTRACT_FMT_BEQ_VARS \
+#define EXTRACT_IFMT_BEQ_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_r2; \
SI f_disp16; \
unsigned int length;
-#define EXTRACT_FMT_BEQ_CODE \
+#define EXTRACT_IFMT_BEQ_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
f_disp16 = ((((EXTRACT_INT (insn, 32, 16, 16)) << (2))) + (pc)); \
-#define EXTRACT_FMT_BEQZ_VARS \
+#define EXTRACT_IFMT_BEQZ_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_r2; \
SI f_disp16; \
unsigned int length;
-#define EXTRACT_FMT_BEQZ_CODE \
+#define EXTRACT_IFMT_BEQZ_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
f_disp16 = ((((EXTRACT_INT (insn, 32, 16, 16)) << (2))) + (pc)); \
-#define EXTRACT_FMT_BL8_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- SI f_disp8; \
- unsigned int length;
-#define EXTRACT_FMT_BL8_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_disp8 = ((((EXTRACT_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); \
-
-#define EXTRACT_FMT_BL24_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- SI f_disp24; \
- unsigned int length;
-#define EXTRACT_FMT_BL24_CODE \
- length = 4; \
- f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
- f_disp24 = ((((EXTRACT_INT (insn, 32, 8, 24)) << (2))) + (pc)); \
-
-#define EXTRACT_FMT_BRA8_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- SI f_disp8; \
- unsigned int length;
-#define EXTRACT_FMT_BRA8_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_disp8 = ((((EXTRACT_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); \
-
-#define EXTRACT_FMT_BRA24_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- SI f_disp24; \
- unsigned int length;
-#define EXTRACT_FMT_BRA24_CODE \
- length = 4; \
- f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
- f_disp24 = ((((EXTRACT_INT (insn, 32, 8, 24)) << (2))) + (pc)); \
-
-#define EXTRACT_FMT_CMP_VARS \
+#define EXTRACT_IFMT_CMP_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_op2; \
UINT f_r2; \
unsigned int length;
-#define EXTRACT_FMT_CMP_CODE \
+#define EXTRACT_IFMT_CMP_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-#define EXTRACT_FMT_CMPI_VARS \
+#define EXTRACT_IFMT_CMPI_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_r2; \
INT f_simm16; \
unsigned int length;
-#define EXTRACT_FMT_CMPI_CODE \
+#define EXTRACT_IFMT_CMPI_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
-#define EXTRACT_FMT_DIV_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- INT f_simm16; \
- unsigned int length;
-#define EXTRACT_FMT_DIV_CODE \
- length = 4; \
- f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
- f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
-
-#define EXTRACT_FMT_JL_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_JL_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_JMP_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_JMP_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_LD_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_LD_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_LD_D_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- INT f_simm16; \
- unsigned int length;
-#define EXTRACT_FMT_LD_D_CODE \
- length = 4; \
- f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
- f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
-
-#define EXTRACT_FMT_LDB_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_LDB_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_LDB_D_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- INT f_simm16; \
- unsigned int length;
-#define EXTRACT_FMT_LDB_D_CODE \
- length = 4; \
- f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
- f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
-
-#define EXTRACT_FMT_LDH_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_LDH_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_LDH_D_VARS \
+#define EXTRACT_IFMT_DIV_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_r2; \
INT f_simm16; \
unsigned int length;
-#define EXTRACT_FMT_LDH_D_CODE \
+#define EXTRACT_IFMT_DIV_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
-#define EXTRACT_FMT_LD_PLUS_VARS \
+#define EXTRACT_IFMT_JL_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_op2; \
UINT f_r2; \
unsigned int length;
-#define EXTRACT_FMT_LD_PLUS_CODE \
+#define EXTRACT_IFMT_JL_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-#define EXTRACT_FMT_LD24_VARS \
+#define EXTRACT_IFMT_LD24_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_uimm24; \
unsigned int length;
-#define EXTRACT_FMT_LD24_CODE \
+#define EXTRACT_IFMT_LD24_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_uimm24 = EXTRACT_UINT (insn, 32, 8, 24); \
-#define EXTRACT_FMT_LDI8_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- INT f_simm8; \
- unsigned int length;
-#define EXTRACT_FMT_LDI8_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_simm8 = EXTRACT_INT (insn, 16, 8, 8); \
-
-#define EXTRACT_FMT_LDI16_VARS \
+#define EXTRACT_IFMT_LDI16_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_r2; \
INT f_simm16; \
unsigned int length;
-#define EXTRACT_FMT_LDI16_CODE \
+#define EXTRACT_IFMT_LDI16_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
-#define EXTRACT_FMT_LOCK_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_LOCK_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_MACHI_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_MACHI_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_MULHI_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_MULHI_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_MV_VARS \
+#define EXTRACT_IFMT_MVFACHI_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_op2; \
UINT f_r2; \
unsigned int length;
-#define EXTRACT_FMT_MV_CODE \
+#define EXTRACT_IFMT_MVFACHI_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-#define EXTRACT_FMT_MVFACHI_VARS \
+#define EXTRACT_IFMT_MVFC_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_op2; \
UINT f_r2; \
unsigned int length;
-#define EXTRACT_FMT_MVFACHI_CODE \
+#define EXTRACT_IFMT_MVFC_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-#define EXTRACT_FMT_MVFC_VARS \
+#define EXTRACT_IFMT_MVTACHI_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_op2; \
UINT f_r2; \
unsigned int length;
-#define EXTRACT_FMT_MVFC_CODE \
+#define EXTRACT_IFMT_MVTACHI_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-#define EXTRACT_FMT_MVTACHI_VARS \
+#define EXTRACT_IFMT_MVTC_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_op2; \
UINT f_r2; \
unsigned int length;
-#define EXTRACT_FMT_MVTACHI_CODE \
+#define EXTRACT_IFMT_MVTC_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-#define EXTRACT_FMT_MVTC_VARS \
+#define EXTRACT_IFMT_NOP_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_op2; \
UINT f_r2; \
unsigned int length;
-#define EXTRACT_FMT_MVTC_CODE \
+#define EXTRACT_IFMT_NOP_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-#define EXTRACT_FMT_NOP_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_NOP_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_RAC_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_RAC_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_RTE_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_RTE_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_SETH_VARS \
+#define EXTRACT_IFMT_SETH_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_r2; \
UINT f_hi16; \
unsigned int length;
-#define EXTRACT_FMT_SETH_CODE \
+#define EXTRACT_IFMT_SETH_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
f_hi16 = EXTRACT_UINT (insn, 32, 16, 16); \
-#define EXTRACT_FMT_SLL3_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- INT f_simm16; \
- unsigned int length;
-#define EXTRACT_FMT_SLL3_CODE \
- length = 4; \
- f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
- f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
-
-#define EXTRACT_FMT_SLLI_VARS \
+#define EXTRACT_IFMT_SLLI_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_shift_op2; \
UINT f_uimm5; \
unsigned int length;
-#define EXTRACT_FMT_SLLI_CODE \
+#define EXTRACT_IFMT_SLLI_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_shift_op2 = EXTRACT_UINT (insn, 16, 8, 3); \
f_uimm5 = EXTRACT_UINT (insn, 16, 11, 5); \
-#define EXTRACT_FMT_ST_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_ST_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_ST_D_VARS \
+#define EXTRACT_IFMT_ST_D_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_r2; \
INT f_simm16; \
unsigned int length;
-#define EXTRACT_FMT_ST_D_CODE \
+#define EXTRACT_IFMT_ST_D_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
-#define EXTRACT_FMT_STB_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_STB_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_STB_D_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- INT f_simm16; \
- unsigned int length;
-#define EXTRACT_FMT_STB_D_CODE \
- length = 4; \
- f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
- f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
-
-#define EXTRACT_FMT_STH_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_STH_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_STH_D_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- INT f_simm16; \
- unsigned int length;
-#define EXTRACT_FMT_STH_D_CODE \
- length = 4; \
- f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
- f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
-
-#define EXTRACT_FMT_ST_PLUS_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_ST_PLUS_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_TRAP_VARS \
+#define EXTRACT_IFMT_TRAP_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_op2; \
UINT f_uimm4; \
unsigned int length;
-#define EXTRACT_FMT_TRAP_CODE \
+#define EXTRACT_IFMT_TRAP_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
f_uimm4 = EXTRACT_UINT (insn, 16, 12, 4); \
-#define EXTRACT_FMT_UNLOCK_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_UNLOCK_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
/* Collection of various things for the trace handler to use. */
typedef struct trace_record {
- PCADDR pc;
+ IADDR pc;
/* FIXME:wip */
} TRACE_RECORD;
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
+Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
This file is part of the GNU Simulators.
} MODEL_M32RX_DATA;
union sem_fields {
- struct { /* empty format for unspecified field list */
+ struct { /* empty sformat for unspecified field list */
int empty;
} fmt_empty;
struct { /* e.g. add $dr,$sr */
unsigned char in_src2;
} fmt_cmpz;
struct { /* e.g. div $dr,$sr */
- SI * i_sr;
SI * i_dr;
- unsigned char in_sr;
+ SI * i_sr;
unsigned char in_dr;
+ unsigned char in_sr;
unsigned char out_dr;
} fmt_div;
struct { /* e.g. ld $dr,@$sr */
unsigned char out_dr;
} fmt_slli;
struct { /* e.g. st $src1,@$src2 */
- SI * i_src2;
SI * i_src1;
- unsigned char in_src2;
+ SI * i_src2;
unsigned char in_src1;
+ unsigned char in_src2;
} fmt_st;
struct { /* e.g. st $src1,@($slo16,$src2) */
INT f_simm16;
- SI * i_src2;
SI * i_src1;
- unsigned char in_src2;
+ SI * i_src2;
unsigned char in_src1;
+ unsigned char in_src2;
} fmt_st_d;
struct { /* e.g. stb $src1,@$src2 */
- SI * i_src2;
SI * i_src1;
- unsigned char in_src2;
+ SI * i_src2;
unsigned char in_src1;
+ unsigned char in_src2;
} fmt_stb;
struct { /* e.g. stb $src1,@($slo16,$src2) */
INT f_simm16;
- SI * i_src2;
SI * i_src1;
- unsigned char in_src2;
+ SI * i_src2;
unsigned char in_src1;
+ unsigned char in_src2;
} fmt_stb_d;
struct { /* e.g. sth $src1,@$src2 */
- SI * i_src2;
SI * i_src1;
- unsigned char in_src2;
+ SI * i_src2;
unsigned char in_src1;
+ unsigned char in_src2;
} fmt_sth;
struct { /* e.g. sth $src1,@($slo16,$src2) */
INT f_simm16;
- SI * i_src2;
SI * i_src1;
- unsigned char in_src2;
+ SI * i_src2;
unsigned char in_src1;
+ unsigned char in_src2;
} fmt_sth_d;
struct { /* e.g. st $src1,@+$src2 */
- SI * i_src2;
SI * i_src1;
- unsigned char in_src2;
+ SI * i_src2;
unsigned char in_src1;
+ unsigned char in_src2;
unsigned char out_src2;
} fmt_st_plus;
struct { /* e.g. unlock $src1,@$src2 */
- SI * i_src2;
SI * i_src1;
- unsigned char in_src2;
+ SI * i_src2;
unsigned char in_src1;
+ unsigned char in_src2;
} fmt_unlock;
struct { /* e.g. satb $dr,$sr */
SI * i_sr;
IADDR i_disp24;
} fmt_bc24;
struct { /* e.g. beq $src1,$src2,$disp16 */
+ IADDR i_disp16;
SI * i_src1;
SI * i_src2;
- IADDR i_disp16;
unsigned char in_src1;
unsigned char in_src2;
} fmt_beq;
struct { /* e.g. beqz $src2,$disp16 */
- SI * i_src2;
IADDR i_disp16;
+ SI * i_src2;
unsigned char in_src2;
} fmt_beqz;
struct { /* e.g. bl.s $disp8 */
/* The ARGBUF struct. */
struct argbuf {
/* These are the baseclass definitions. */
- PCADDR addr;
+ IADDR addr;
const IDESC *idesc;
char trace_p;
char profile_p;
/* Macros to simplify extraction, reading and semantic code.
These define and assign the local vars that contain the insn's fields. */
-#define EXTRACT_FMT_EMPTY_VARS \
+#define EXTRACT_IFMT_EMPTY_VARS \
/* Instruction fields. */ \
unsigned int length;
-#define EXTRACT_FMT_EMPTY_CODE \
+#define EXTRACT_IFMT_EMPTY_CODE \
length = 0; \
-#define EXTRACT_FMT_ADD_VARS \
+#define EXTRACT_IFMT_ADD_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_op2; \
UINT f_r2; \
unsigned int length;
-#define EXTRACT_FMT_ADD_CODE \
+#define EXTRACT_IFMT_ADD_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-#define EXTRACT_FMT_ADD3_VARS \
+#define EXTRACT_IFMT_ADD3_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_r2; \
INT f_simm16; \
unsigned int length;
-#define EXTRACT_FMT_ADD3_CODE \
+#define EXTRACT_IFMT_ADD3_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
-#define EXTRACT_FMT_AND3_VARS \
+#define EXTRACT_IFMT_AND3_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_r2; \
UINT f_uimm16; \
unsigned int length;
-#define EXTRACT_FMT_AND3_CODE \
+#define EXTRACT_IFMT_AND3_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
f_uimm16 = EXTRACT_UINT (insn, 32, 16, 16); \
-#define EXTRACT_FMT_OR3_VARS \
+#define EXTRACT_IFMT_OR3_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_r2; \
UINT f_uimm16; \
unsigned int length;
-#define EXTRACT_FMT_OR3_CODE \
+#define EXTRACT_IFMT_OR3_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
f_uimm16 = EXTRACT_UINT (insn, 32, 16, 16); \
-#define EXTRACT_FMT_ADDI_VARS \
+#define EXTRACT_IFMT_ADDI_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
INT f_simm8; \
unsigned int length;
-#define EXTRACT_FMT_ADDI_CODE \
+#define EXTRACT_IFMT_ADDI_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_simm8 = EXTRACT_INT (insn, 16, 8, 8); \
-#define EXTRACT_FMT_ADDV_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_ADDV_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_ADDV3_VARS \
+#define EXTRACT_IFMT_ADDV3_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_r2; \
INT f_simm16; \
unsigned int length;
-#define EXTRACT_FMT_ADDV3_CODE \
+#define EXTRACT_IFMT_ADDV3_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
-#define EXTRACT_FMT_ADDX_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_ADDX_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_BC8_VARS \
+#define EXTRACT_IFMT_BC8_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
SI f_disp8; \
unsigned int length;
-#define EXTRACT_FMT_BC8_CODE \
+#define EXTRACT_IFMT_BC8_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_disp8 = ((((EXTRACT_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); \
-#define EXTRACT_FMT_BC24_VARS \
+#define EXTRACT_IFMT_BC24_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
SI f_disp24; \
unsigned int length;
-#define EXTRACT_FMT_BC24_CODE \
+#define EXTRACT_IFMT_BC24_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_disp24 = ((((EXTRACT_INT (insn, 32, 8, 24)) << (2))) + (pc)); \
-#define EXTRACT_FMT_BEQ_VARS \
+#define EXTRACT_IFMT_BEQ_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_r2; \
SI f_disp16; \
unsigned int length;
-#define EXTRACT_FMT_BEQ_CODE \
+#define EXTRACT_IFMT_BEQ_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
f_disp16 = ((((EXTRACT_INT (insn, 32, 16, 16)) << (2))) + (pc)); \
-#define EXTRACT_FMT_BEQZ_VARS \
+#define EXTRACT_IFMT_BEQZ_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_r2; \
SI f_disp16; \
unsigned int length;
-#define EXTRACT_FMT_BEQZ_CODE \
+#define EXTRACT_IFMT_BEQZ_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
f_disp16 = ((((EXTRACT_INT (insn, 32, 16, 16)) << (2))) + (pc)); \
-#define EXTRACT_FMT_BL8_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- SI f_disp8; \
- unsigned int length;
-#define EXTRACT_FMT_BL8_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_disp8 = ((((EXTRACT_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); \
-
-#define EXTRACT_FMT_BL24_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- SI f_disp24; \
- unsigned int length;
-#define EXTRACT_FMT_BL24_CODE \
- length = 4; \
- f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
- f_disp24 = ((((EXTRACT_INT (insn, 32, 8, 24)) << (2))) + (pc)); \
-
-#define EXTRACT_FMT_BCL8_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- SI f_disp8; \
- unsigned int length;
-#define EXTRACT_FMT_BCL8_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_disp8 = ((((EXTRACT_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); \
-
-#define EXTRACT_FMT_BCL24_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- SI f_disp24; \
- unsigned int length;
-#define EXTRACT_FMT_BCL24_CODE \
- length = 4; \
- f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
- f_disp24 = ((((EXTRACT_INT (insn, 32, 8, 24)) << (2))) + (pc)); \
-
-#define EXTRACT_FMT_BRA8_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- SI f_disp8; \
- unsigned int length;
-#define EXTRACT_FMT_BRA8_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_disp8 = ((((EXTRACT_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); \
-
-#define EXTRACT_FMT_BRA24_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- SI f_disp24; \
- unsigned int length;
-#define EXTRACT_FMT_BRA24_CODE \
- length = 4; \
- f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
- f_disp24 = ((((EXTRACT_INT (insn, 32, 8, 24)) << (2))) + (pc)); \
-
-#define EXTRACT_FMT_CMP_VARS \
+#define EXTRACT_IFMT_CMP_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_op2; \
UINT f_r2; \
unsigned int length;
-#define EXTRACT_FMT_CMP_CODE \
+#define EXTRACT_IFMT_CMP_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-#define EXTRACT_FMT_CMPI_VARS \
+#define EXTRACT_IFMT_CMPI_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_r2; \
INT f_simm16; \
unsigned int length;
-#define EXTRACT_FMT_CMPI_CODE \
+#define EXTRACT_IFMT_CMPI_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
-#define EXTRACT_FMT_CMPZ_VARS \
+#define EXTRACT_IFMT_CMPZ_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_op2; \
UINT f_r2; \
unsigned int length;
-#define EXTRACT_FMT_CMPZ_CODE \
+#define EXTRACT_IFMT_CMPZ_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-#define EXTRACT_FMT_DIV_VARS \
+#define EXTRACT_IFMT_DIV_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_r2; \
INT f_simm16; \
unsigned int length;
-#define EXTRACT_FMT_DIV_CODE \
+#define EXTRACT_IFMT_DIV_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
-#define EXTRACT_FMT_JC_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_JC_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_JL_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_JL_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_JMP_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_JMP_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_LD_VARS \
+#define EXTRACT_IFMT_JC_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_op2; \
UINT f_r2; \
unsigned int length;
-#define EXTRACT_FMT_LD_CODE \
+#define EXTRACT_IFMT_JC_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-#define EXTRACT_FMT_LD_D_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- INT f_simm16; \
- unsigned int length;
-#define EXTRACT_FMT_LD_D_CODE \
- length = 4; \
- f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
- f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
-
-#define EXTRACT_FMT_LDB_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_LDB_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_LDB_D_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- INT f_simm16; \
- unsigned int length;
-#define EXTRACT_FMT_LDB_D_CODE \
- length = 4; \
- f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
- f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
-
-#define EXTRACT_FMT_LDH_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_LDH_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_LDH_D_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- INT f_simm16; \
- unsigned int length;
-#define EXTRACT_FMT_LDH_D_CODE \
- length = 4; \
- f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
- f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
-
-#define EXTRACT_FMT_LD_PLUS_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_LD_PLUS_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_LD24_VARS \
+#define EXTRACT_IFMT_LD24_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_uimm24; \
unsigned int length;
-#define EXTRACT_FMT_LD24_CODE \
+#define EXTRACT_IFMT_LD24_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_uimm24 = EXTRACT_UINT (insn, 32, 8, 24); \
-#define EXTRACT_FMT_LDI8_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- INT f_simm8; \
- unsigned int length;
-#define EXTRACT_FMT_LDI8_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_simm8 = EXTRACT_INT (insn, 16, 8, 8); \
-
-#define EXTRACT_FMT_LDI16_VARS \
+#define EXTRACT_IFMT_LDI16_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_r2; \
INT f_simm16; \
unsigned int length;
-#define EXTRACT_FMT_LDI16_CODE \
+#define EXTRACT_IFMT_LDI16_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
-#define EXTRACT_FMT_LOCK_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_LOCK_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_MACHI_A_VARS \
+#define EXTRACT_IFMT_MACHI_A_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_op23; \
UINT f_r2; \
unsigned int length;
-#define EXTRACT_FMT_MACHI_A_CODE \
+#define EXTRACT_IFMT_MACHI_A_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_op23 = EXTRACT_UINT (insn, 16, 9, 3); \
f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-#define EXTRACT_FMT_MULHI_A_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_acc; \
- UINT f_op23; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_MULHI_A_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_acc = EXTRACT_UINT (insn, 16, 8, 1); \
- f_op23 = EXTRACT_UINT (insn, 16, 9, 3); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_MV_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_MV_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_MVFACHI_A_VARS \
+#define EXTRACT_IFMT_MVFACHI_A_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_accs; \
UINT f_op3; \
unsigned int length;
-#define EXTRACT_FMT_MVFACHI_A_CODE \
+#define EXTRACT_IFMT_MVFACHI_A_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_accs = EXTRACT_UINT (insn, 16, 12, 2); \
f_op3 = EXTRACT_UINT (insn, 16, 14, 2); \
-#define EXTRACT_FMT_MVFC_VARS \
+#define EXTRACT_IFMT_MVFC_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_op2; \
UINT f_r2; \
unsigned int length;
-#define EXTRACT_FMT_MVFC_CODE \
+#define EXTRACT_IFMT_MVFC_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-#define EXTRACT_FMT_MVTACHI_A_VARS \
+#define EXTRACT_IFMT_MVTACHI_A_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_accs; \
UINT f_op3; \
unsigned int length;
-#define EXTRACT_FMT_MVTACHI_A_CODE \
+#define EXTRACT_IFMT_MVTACHI_A_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_accs = EXTRACT_UINT (insn, 16, 12, 2); \
f_op3 = EXTRACT_UINT (insn, 16, 14, 2); \
-#define EXTRACT_FMT_MVTC_VARS \
+#define EXTRACT_IFMT_MVTC_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_op2; \
UINT f_r2; \
unsigned int length;
-#define EXTRACT_FMT_MVTC_CODE \
+#define EXTRACT_IFMT_MVTC_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-#define EXTRACT_FMT_NOP_VARS \
+#define EXTRACT_IFMT_NOP_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_op2; \
UINT f_r2; \
unsigned int length;
-#define EXTRACT_FMT_NOP_CODE \
+#define EXTRACT_IFMT_NOP_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-#define EXTRACT_FMT_RAC_DSI_VARS \
+#define EXTRACT_IFMT_RAC_DSI_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_accd; \
UINT f_bit14; \
SI f_imm1; \
unsigned int length;
-#define EXTRACT_FMT_RAC_DSI_CODE \
+#define EXTRACT_IFMT_RAC_DSI_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_accd = EXTRACT_UINT (insn, 16, 4, 2); \
f_bit14 = EXTRACT_UINT (insn, 16, 14, 1); \
f_imm1 = ((EXTRACT_UINT (insn, 16, 15, 1)) + (1)); \
-#define EXTRACT_FMT_RTE_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_RTE_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_SETH_VARS \
+#define EXTRACT_IFMT_SETH_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_r2; \
UINT f_hi16; \
unsigned int length;
-#define EXTRACT_FMT_SETH_CODE \
+#define EXTRACT_IFMT_SETH_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
f_hi16 = EXTRACT_UINT (insn, 32, 16, 16); \
-#define EXTRACT_FMT_SLL3_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- INT f_simm16; \
- unsigned int length;
-#define EXTRACT_FMT_SLL3_CODE \
- length = 4; \
- f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
- f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
-
-#define EXTRACT_FMT_SLLI_VARS \
+#define EXTRACT_IFMT_SLLI_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_shift_op2; \
UINT f_uimm5; \
unsigned int length;
-#define EXTRACT_FMT_SLLI_CODE \
+#define EXTRACT_IFMT_SLLI_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_shift_op2 = EXTRACT_UINT (insn, 16, 8, 3); \
f_uimm5 = EXTRACT_UINT (insn, 16, 11, 5); \
-#define EXTRACT_FMT_ST_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_ST_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_ST_D_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- INT f_simm16; \
- unsigned int length;
-#define EXTRACT_FMT_ST_D_CODE \
- length = 4; \
- f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
- f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
-
-#define EXTRACT_FMT_STB_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_STB_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_STB_D_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- INT f_simm16; \
- unsigned int length;
-#define EXTRACT_FMT_STB_D_CODE \
- length = 4; \
- f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
- f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
-
-#define EXTRACT_FMT_STH_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_STH_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_STH_D_VARS \
+#define EXTRACT_IFMT_ST_D_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_r2; \
INT f_simm16; \
unsigned int length;
-#define EXTRACT_FMT_STH_D_CODE \
+#define EXTRACT_IFMT_ST_D_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
-#define EXTRACT_FMT_ST_PLUS_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_ST_PLUS_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_TRAP_VARS \
+#define EXTRACT_IFMT_TRAP_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_op2; \
UINT f_uimm4; \
unsigned int length;
-#define EXTRACT_FMT_TRAP_CODE \
+#define EXTRACT_IFMT_TRAP_CODE \
length = 2; \
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
f_uimm4 = EXTRACT_UINT (insn, 16, 12, 4); \
-#define EXTRACT_FMT_UNLOCK_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_UNLOCK_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_SATB_VARS \
+#define EXTRACT_IFMT_SATB_VARS \
/* Instruction fields. */ \
UINT f_op1; \
UINT f_r1; \
UINT f_r2; \
UINT f_uimm16; \
unsigned int length;
-#define EXTRACT_FMT_SATB_CODE \
+#define EXTRACT_IFMT_SATB_CODE \
length = 4; \
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
f_uimm16 = EXTRACT_UINT (insn, 32, 16, 16); \
-#define EXTRACT_FMT_SAT_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- UINT f_uimm16; \
- unsigned int length;
-#define EXTRACT_FMT_SAT_CODE \
- length = 4; \
- f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
- f_uimm16 = EXTRACT_UINT (insn, 32, 16, 16); \
-
-#define EXTRACT_FMT_SADD_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_SADD_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_MACWU1_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_MACWU1_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_MSBLO_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_MSBLO_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_MULWU1_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_MULWU1_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_FMT_SC_VARS \
- /* Instruction fields. */ \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_FMT_SC_CODE \
- length = 2; \
- f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
-
/* Queued output values of an instruction. */
struct parexec {
union {
- struct { /* empty format for unspecified field list */
+ struct { /* empty sformat for unspecified field list */
int empty;
} fmt_empty;
struct { /* e.g. add $dr,$sr */
SI dr;
} fmt_addi;
struct { /* e.g. addv $dr,$sr */
- SI dr;
BI condbit;
+ SI dr;
} fmt_addv;
struct { /* e.g. addv3 $dr,$sr,$simm16 */
- SI dr;
BI condbit;
+ SI dr;
} fmt_addv3;
struct { /* e.g. addx $dr,$sr */
- SI dr;
BI condbit;
+ SI dr;
} fmt_addx;
struct { /* e.g. bc.s $disp8 */
USI pc;
SI dr;
} fmt_ldi16;
struct { /* e.g. lock $dr,@$sr */
- BI h_lock_0;
SI dr;
+ BI h_lock_0;
} fmt_lock;
struct { /* e.g. machi $src1,$src2,$acc */
DI acc;
DI accd;
} fmt_rac_dsi;
struct { /* e.g. rte */
- USI pc;
+ UQI h_bpsw_0;
USI h_cr_6;
UQI h_psw_0;
- UQI h_bpsw_0;
+ USI pc;
} fmt_rte;
struct { /* e.g. seth $dr,$hash$hi16 */
SI dr;
SI src2;
} fmt_st_plus;
struct { /* e.g. trap $uimm4 */
- USI h_cr_14;
- USI h_cr_6;
UQI h_bbpsw_0;
UQI h_bpsw_0;
+ USI h_cr_14;
+ USI h_cr_6;
UQI h_psw_0;
SI pc;
} fmt_trap;
struct { /* e.g. unlock $src1,@$src2 */
+ BI h_lock_0;
SI h_memory_src2;
USI h_memory_src2_idx;
- BI h_lock_0;
} fmt_unlock;
struct { /* e.g. satb $dr,$sr */
SI dr;
/* Collection of various things for the trace handler to use. */
typedef struct trace_record {
- PCADDR pc;
+ IADDR pc;
/* FIXME:wip */
} TRACE_RECORD;
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
+Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
This file is part of the GNU Simulators.
CPU_IDESC (cpu) = table;
}
-/* Enum declaration for all instruction formats. */
-typedef enum ifmt {
+/* Enum declaration for all instruction semantic formats. */
+typedef enum sfmt {
FMT_EMPTY, FMT_ADD, FMT_ADD3, FMT_AND3
, FMT_OR3, FMT_ADDI, FMT_ADDV, FMT_ADDV3
, FMT_ADDX, FMT_BC8, FMT_BC24, FMT_BEQ
, FMT_ST_PLUS, FMT_TRAP, FMT_UNLOCK, FMT_SATB
, FMT_SAT, FMT_SADD, FMT_MACWU1, FMT_MSBLO
, FMT_MULWU1, FMT_SC
-} IFMT;
+} SFMT;
/* The decoder uses this to record insns and direct extraction handling. */
typedef struct {
const IDESC *idesc;
#ifdef __GNUC__
- void *ifmt;
+ void *sfmt;
#else
- enum ifmt ifmt;
+ enum sfmt sfmt;
#endif
} DECODE_DESC;
/* Macro to go from decode phase to extraction phase. */
#ifdef __GNUC__
-#define GOTO_EXTRACT(id) goto *(id)->ifmt
+#define GOTO_EXTRACT(id) goto *(id)->sfmt
#else
#define GOTO_EXTRACT(id) goto extract
#endif
/* Given an instruction, return a pointer to its IDESC entry. */
const IDESC *
-m32rxf_decode (SIM_CPU *current_cpu, PCADDR pc,
+m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
CGEN_INSN_INT base_insn, CGEN_INSN_INT entire_insn,
ARGBUF *abuf)
{
#endif
CGEN_INSN_INT insn = base_insn;
static const DECODE_DESC idecode_invalid = { I (INSN_X_INVALID), E (FMT_EMPTY) };
+
{
#ifdef __GNUC__
static const void *labels_0[256] = {
extract:
{
#ifndef __GNUC__
- switch (idecode->ifmt)
+ switch (idecode->sfmt)
#endif
{
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_empty.f
- EXTRACT_FMT_EMPTY_VARS /* */
+ EXTRACT_IFMT_EMPTY_VARS /* */
- EXTRACT_FMT_EMPTY_CODE
+ EXTRACT_IFMT_EMPTY_CODE
/* Record the fields for the semantic handler. */
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_empty", (char *) 0));
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_add.f
- EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ADD_CODE
+ EXTRACT_IFMT_ADD_CODE
/* Record the fields for the semantic handler. */
FLD (i_dr) = & CPU (h_gr)[f_r1];
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_add3.f
- EXTRACT_FMT_ADD3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_IFMT_ADD3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_ADD3_CODE
+ EXTRACT_IFMT_ADD3_CODE
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_and3.f
- EXTRACT_FMT_AND3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
+ EXTRACT_IFMT_AND3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_AND3_CODE
+ EXTRACT_IFMT_AND3_CODE
/* Record the fields for the semantic handler. */
FLD (f_uimm16) = f_uimm16;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_or3.f
- EXTRACT_FMT_OR3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
+ EXTRACT_IFMT_OR3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_OR3_CODE
+ EXTRACT_IFMT_OR3_CODE
/* Record the fields for the semantic handler. */
FLD (f_uimm16) = f_uimm16;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_addi.f
- EXTRACT_FMT_ADDI_VARS /* f-op1 f-r1 f-simm8 */
+ EXTRACT_IFMT_ADDI_VARS /* f-op1 f-r1 f-simm8 */
- EXTRACT_FMT_ADDI_CODE
+ EXTRACT_IFMT_ADDI_CODE
/* Record the fields for the semantic handler. */
FLD (f_simm8) = f_simm8;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_addv.f
- EXTRACT_FMT_ADDV_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ADDV_CODE
+ EXTRACT_IFMT_ADD_CODE
/* Record the fields for the semantic handler. */
FLD (i_dr) = & CPU (h_gr)[f_r1];
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_addv3.f
- EXTRACT_FMT_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_IFMT_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_ADDV3_CODE
+ EXTRACT_IFMT_ADDV3_CODE
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_addx.f
- EXTRACT_FMT_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ADDX_CODE
+ EXTRACT_IFMT_ADD_CODE
/* Record the fields for the semantic handler. */
FLD (i_dr) = & CPU (h_gr)[f_r1];
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.cti.fields.fmt_bc8.f
- EXTRACT_FMT_BC8_VARS /* f-op1 f-r1 f-disp8 */
+ EXTRACT_IFMT_BC8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_BC8_CODE
+ EXTRACT_IFMT_BC8_CODE
/* Record the fields for the semantic handler. */
FLD (i_disp8) = f_disp8;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.cti.fields.fmt_bc24.f
- EXTRACT_FMT_BC24_VARS /* f-op1 f-r1 f-disp24 */
+ EXTRACT_IFMT_BC24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_BC24_CODE
+ EXTRACT_IFMT_BC24_CODE
/* Record the fields for the semantic handler. */
FLD (i_disp24) = f_disp24;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.cti.fields.fmt_beq.f
- EXTRACT_FMT_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
+ EXTRACT_IFMT_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
- EXTRACT_FMT_BEQ_CODE
+ EXTRACT_IFMT_BEQ_CODE
/* Record the fields for the semantic handler. */
+ FLD (i_disp16) = f_disp16;
FLD (i_src1) = & CPU (h_gr)[f_r1];
FLD (i_src2) = & CPU (h_gr)[f_r2];
- FLD (i_disp16) = f_disp16;
SEM_BRANCH_INIT_EXTRACT (abuf);
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_beq", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, (char *) 0));
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_beq", "disp16 0x%x", 'x', f_disp16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
- EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
+ EXTRACT_IFMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
- EXTRACT_FMT_BEQZ_CODE
+ EXTRACT_IFMT_BEQZ_CODE
/* Record the fields for the semantic handler. */
- FLD (i_src2) = & CPU (h_gr)[f_r2];
FLD (i_disp16) = f_disp16;
+ FLD (i_src2) = & CPU (h_gr)[f_r2];
SEM_BRANCH_INIT_EXTRACT (abuf);
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_beqz", "src2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, (char *) 0));
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_beqz", "disp16 0x%x", 'x', f_disp16, "src2 0x%x", 'x', f_r2, (char *) 0));
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.cti.fields.fmt_bl8.f
- EXTRACT_FMT_BL8_VARS /* f-op1 f-r1 f-disp8 */
+ EXTRACT_IFMT_BC8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_BL8_CODE
+ EXTRACT_IFMT_BC8_CODE
/* Record the fields for the semantic handler. */
FLD (i_disp8) = f_disp8;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.cti.fields.fmt_bl24.f
- EXTRACT_FMT_BL24_VARS /* f-op1 f-r1 f-disp24 */
+ EXTRACT_IFMT_BC24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_BL24_CODE
+ EXTRACT_IFMT_BC24_CODE
/* Record the fields for the semantic handler. */
FLD (i_disp24) = f_disp24;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.cti.fields.fmt_bcl8.f
- EXTRACT_FMT_BCL8_VARS /* f-op1 f-r1 f-disp8 */
+ EXTRACT_IFMT_BC8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_BCL8_CODE
+ EXTRACT_IFMT_BC8_CODE
/* Record the fields for the semantic handler. */
FLD (i_disp8) = f_disp8;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.cti.fields.fmt_bcl24.f
- EXTRACT_FMT_BCL24_VARS /* f-op1 f-r1 f-disp24 */
+ EXTRACT_IFMT_BC24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_BCL24_CODE
+ EXTRACT_IFMT_BC24_CODE
/* Record the fields for the semantic handler. */
FLD (i_disp24) = f_disp24;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.cti.fields.fmt_bra8.f
- EXTRACT_FMT_BRA8_VARS /* f-op1 f-r1 f-disp8 */
+ EXTRACT_IFMT_BC8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_BRA8_CODE
+ EXTRACT_IFMT_BC8_CODE
/* Record the fields for the semantic handler. */
FLD (i_disp8) = f_disp8;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.cti.fields.fmt_bra24.f
- EXTRACT_FMT_BRA24_VARS /* f-op1 f-r1 f-disp24 */
+ EXTRACT_IFMT_BC24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_BRA24_CODE
+ EXTRACT_IFMT_BC24_CODE
/* Record the fields for the semantic handler. */
FLD (i_disp24) = f_disp24;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_cmp.f
- EXTRACT_FMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_CMP_CODE
+ EXTRACT_IFMT_CMP_CODE
/* Record the fields for the semantic handler. */
FLD (i_src1) = & CPU (h_gr)[f_r1];
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_cmpi.f
- EXTRACT_FMT_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_IFMT_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_CMPI_CODE
+ EXTRACT_IFMT_CMPI_CODE
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_cmpz.f
- EXTRACT_FMT_CMPZ_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_CMPZ_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_CMPZ_CODE
+ EXTRACT_IFMT_CMPZ_CODE
/* Record the fields for the semantic handler. */
FLD (i_src2) = & CPU (h_gr)[f_r2];
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_div.f
- EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_IFMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_DIV_CODE
+ EXTRACT_IFMT_DIV_CODE
/* Record the fields for the semantic handler. */
- FLD (i_sr) = & CPU (h_gr)[f_r2];
FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_div", "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
+ FLD (i_sr) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_div", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- FLD (in_sr) = f_r2;
FLD (in_dr) = f_r1;
+ FLD (in_sr) = f_r2;
FLD (out_dr) = f_r1;
}
#endif
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.cti.fields.fmt_jc.f
- EXTRACT_FMT_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_JC_CODE
+ EXTRACT_IFMT_JC_CODE
/* Record the fields for the semantic handler. */
FLD (i_sr) = & CPU (h_gr)[f_r2];
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.cti.fields.fmt_jl.f
- EXTRACT_FMT_JL_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_JL_CODE
+ EXTRACT_IFMT_JC_CODE
/* Record the fields for the semantic handler. */
FLD (i_sr) = & CPU (h_gr)[f_r2];
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f
- EXTRACT_FMT_JMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_JMP_CODE
+ EXTRACT_IFMT_JC_CODE
/* Record the fields for the semantic handler. */
FLD (i_sr) = & CPU (h_gr)[f_r2];
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_ld.f
- EXTRACT_FMT_LD_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_LD_CODE
+ EXTRACT_IFMT_ADD_CODE
/* Record the fields for the semantic handler. */
FLD (i_sr) = & CPU (h_gr)[f_r2];
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_ld_d.f
- EXTRACT_FMT_LD_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_IFMT_ADD3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_LD_D_CODE
+ EXTRACT_IFMT_ADD3_CODE
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_ldb.f
- EXTRACT_FMT_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_LDB_CODE
+ EXTRACT_IFMT_ADD_CODE
/* Record the fields for the semantic handler. */
FLD (i_sr) = & CPU (h_gr)[f_r2];
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_ldb_d.f
- EXTRACT_FMT_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_IFMT_ADD3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_LDB_D_CODE
+ EXTRACT_IFMT_ADD3_CODE
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_ldh.f
- EXTRACT_FMT_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_LDH_CODE
+ EXTRACT_IFMT_ADD_CODE
/* Record the fields for the semantic handler. */
FLD (i_sr) = & CPU (h_gr)[f_r2];
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_ldh_d.f
- EXTRACT_FMT_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_IFMT_ADD3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_LDH_D_CODE
+ EXTRACT_IFMT_ADD3_CODE
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_ld_plus.f
- EXTRACT_FMT_LD_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_LD_PLUS_CODE
+ EXTRACT_IFMT_ADD_CODE
/* Record the fields for the semantic handler. */
FLD (i_sr) = & CPU (h_gr)[f_r2];
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_ld24.f
- EXTRACT_FMT_LD24_VARS /* f-op1 f-r1 f-uimm24 */
+ EXTRACT_IFMT_LD24_VARS /* f-op1 f-r1 f-uimm24 */
- EXTRACT_FMT_LD24_CODE
+ EXTRACT_IFMT_LD24_CODE
/* Record the fields for the semantic handler. */
FLD (i_uimm24) = f_uimm24;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_ldi8.f
- EXTRACT_FMT_LDI8_VARS /* f-op1 f-r1 f-simm8 */
+ EXTRACT_IFMT_ADDI_VARS /* f-op1 f-r1 f-simm8 */
- EXTRACT_FMT_LDI8_CODE
+ EXTRACT_IFMT_ADDI_CODE
/* Record the fields for the semantic handler. */
FLD (f_simm8) = f_simm8;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_ldi16.f
- EXTRACT_FMT_LDI16_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_IFMT_LDI16_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_LDI16_CODE
+ EXTRACT_IFMT_LDI16_CODE
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_lock.f
- EXTRACT_FMT_LOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_LOCK_CODE
+ EXTRACT_IFMT_ADD_CODE
/* Record the fields for the semantic handler. */
FLD (i_sr) = & CPU (h_gr)[f_r2];
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_machi_a.f
- EXTRACT_FMT_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
+ EXTRACT_IFMT_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
- EXTRACT_FMT_MACHI_A_CODE
+ EXTRACT_IFMT_MACHI_A_CODE
/* Record the fields for the semantic handler. */
FLD (f_acc) = f_acc;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_mulhi_a.f
- EXTRACT_FMT_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
+ EXTRACT_IFMT_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
- EXTRACT_FMT_MULHI_A_CODE
+ EXTRACT_IFMT_MACHI_A_CODE
/* Record the fields for the semantic handler. */
FLD (f_acc) = f_acc;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_mv.f
- EXTRACT_FMT_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MV_CODE
+ EXTRACT_IFMT_ADD_CODE
/* Record the fields for the semantic handler. */
FLD (i_sr) = & CPU (h_gr)[f_r2];
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_mvfachi_a.f
- EXTRACT_FMT_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
+ EXTRACT_IFMT_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
- EXTRACT_FMT_MVFACHI_A_CODE
+ EXTRACT_IFMT_MVFACHI_A_CODE
/* Record the fields for the semantic handler. */
FLD (f_accs) = f_accs;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_mvfc.f
- EXTRACT_FMT_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MVFC_CODE
+ EXTRACT_IFMT_MVFC_CODE
/* Record the fields for the semantic handler. */
FLD (f_r2) = f_r2;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_mvtachi_a.f
- EXTRACT_FMT_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
+ EXTRACT_IFMT_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
- EXTRACT_FMT_MVTACHI_A_CODE
+ EXTRACT_IFMT_MVTACHI_A_CODE
/* Record the fields for the semantic handler. */
FLD (f_accs) = f_accs;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_mvtc.f
- EXTRACT_FMT_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MVTC_CODE
+ EXTRACT_IFMT_MVTC_CODE
/* Record the fields for the semantic handler. */
FLD (f_r1) = f_r1;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_nop.f
- EXTRACT_FMT_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_NOP_CODE
+ EXTRACT_IFMT_NOP_CODE
/* Record the fields for the semantic handler. */
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_nop", (char *) 0));
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_rac_dsi.f
- EXTRACT_FMT_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
+ EXTRACT_IFMT_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
- EXTRACT_FMT_RAC_DSI_CODE
+ EXTRACT_IFMT_RAC_DSI_CODE
/* Record the fields for the semantic handler. */
FLD (f_accs) = f_accs;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.cti.fields.fmt_rte.f
- EXTRACT_FMT_RTE_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_RTE_CODE
+ EXTRACT_IFMT_NOP_CODE
/* Record the fields for the semantic handler. */
SEM_BRANCH_INIT_EXTRACT (abuf);
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_seth.f
- EXTRACT_FMT_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */
+ EXTRACT_IFMT_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */
- EXTRACT_FMT_SETH_CODE
+ EXTRACT_IFMT_SETH_CODE
/* Record the fields for the semantic handler. */
FLD (f_hi16) = f_hi16;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_sll3.f
- EXTRACT_FMT_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_IFMT_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_SLL3_CODE
+ EXTRACT_IFMT_ADDV3_CODE
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_slli.f
- EXTRACT_FMT_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
+ EXTRACT_IFMT_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
- EXTRACT_FMT_SLLI_CODE
+ EXTRACT_IFMT_SLLI_CODE
/* Record the fields for the semantic handler. */
FLD (f_uimm5) = f_uimm5;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_st.f
- EXTRACT_FMT_ST_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ST_CODE
+ EXTRACT_IFMT_CMP_CODE
/* Record the fields for the semantic handler. */
- FLD (i_src2) = & CPU (h_gr)[f_r2];
FLD (i_src1) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st", "src2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, (char *) 0));
+ FLD (i_src2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- FLD (in_src2) = f_r2;
FLD (in_src1) = f_r1;
+ FLD (in_src2) = f_r2;
}
#endif
#undef FLD
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_st_d.f
- EXTRACT_FMT_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_IFMT_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_ST_D_CODE
+ EXTRACT_IFMT_ST_D_CODE
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
- FLD (i_src2) = & CPU (h_gr)[f_r2];
FLD (i_src1) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_d", "f_simm16 0x%x", 'x', f_simm16, "src2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, (char *) 0));
+ FLD (i_src2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_d", "f_simm16 0x%x", 'x', f_simm16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- FLD (in_src2) = f_r2;
FLD (in_src1) = f_r1;
+ FLD (in_src2) = f_r2;
}
#endif
#undef FLD
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_stb.f
- EXTRACT_FMT_STB_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_STB_CODE
+ EXTRACT_IFMT_CMP_CODE
/* Record the fields for the semantic handler. */
- FLD (i_src2) = & CPU (h_gr)[f_r2];
FLD (i_src1) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stb", "src2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, (char *) 0));
+ FLD (i_src2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stb", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- FLD (in_src2) = f_r2;
FLD (in_src1) = f_r1;
+ FLD (in_src2) = f_r2;
}
#endif
#undef FLD
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_stb_d.f
- EXTRACT_FMT_STB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_IFMT_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_STB_D_CODE
+ EXTRACT_IFMT_ST_D_CODE
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
- FLD (i_src2) = & CPU (h_gr)[f_r2];
FLD (i_src1) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stb_d", "f_simm16 0x%x", 'x', f_simm16, "src2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, (char *) 0));
+ FLD (i_src2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stb_d", "f_simm16 0x%x", 'x', f_simm16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- FLD (in_src2) = f_r2;
FLD (in_src1) = f_r1;
+ FLD (in_src2) = f_r2;
}
#endif
#undef FLD
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_sth.f
- EXTRACT_FMT_STH_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_STH_CODE
+ EXTRACT_IFMT_CMP_CODE
/* Record the fields for the semantic handler. */
- FLD (i_src2) = & CPU (h_gr)[f_r2];
FLD (i_src1) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_sth", "src2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, (char *) 0));
+ FLD (i_src2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_sth", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- FLD (in_src2) = f_r2;
FLD (in_src1) = f_r1;
+ FLD (in_src2) = f_r2;
}
#endif
#undef FLD
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_sth_d.f
- EXTRACT_FMT_STH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_IFMT_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_STH_D_CODE
+ EXTRACT_IFMT_ST_D_CODE
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
- FLD (i_src2) = & CPU (h_gr)[f_r2];
FLD (i_src1) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_sth_d", "f_simm16 0x%x", 'x', f_simm16, "src2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, (char *) 0));
+ FLD (i_src2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_sth_d", "f_simm16 0x%x", 'x', f_simm16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- FLD (in_src2) = f_r2;
FLD (in_src1) = f_r1;
+ FLD (in_src2) = f_r2;
}
#endif
#undef FLD
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_st_plus.f
- EXTRACT_FMT_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ST_PLUS_CODE
+ EXTRACT_IFMT_CMP_CODE
/* Record the fields for the semantic handler. */
- FLD (i_src2) = & CPU (h_gr)[f_r2];
FLD (i_src1) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_plus", "src2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, (char *) 0));
+ FLD (i_src2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_plus", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- FLD (in_src2) = f_r2;
FLD (in_src1) = f_r1;
+ FLD (in_src2) = f_r2;
FLD (out_src2) = f_r2;
}
#endif
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.cti.fields.fmt_trap.f
- EXTRACT_FMT_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */
+ EXTRACT_IFMT_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */
- EXTRACT_FMT_TRAP_CODE
+ EXTRACT_IFMT_TRAP_CODE
/* Record the fields for the semantic handler. */
FLD (f_uimm4) = f_uimm4;
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_unlock.f
- EXTRACT_FMT_UNLOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_UNLOCK_CODE
+ EXTRACT_IFMT_CMP_CODE
/* Record the fields for the semantic handler. */
- FLD (i_src2) = & CPU (h_gr)[f_r2];
FLD (i_src1) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_unlock", "src2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, (char *) 0));
+ FLD (i_src2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_unlock", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- FLD (in_src2) = f_r2;
FLD (in_src1) = f_r1;
+ FLD (in_src2) = f_r2;
}
#endif
#undef FLD
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_satb.f
- EXTRACT_FMT_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
+ EXTRACT_IFMT_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_SATB_CODE
+ EXTRACT_IFMT_SATB_CODE
/* Record the fields for the semantic handler. */
FLD (i_sr) = & CPU (h_gr)[f_r2];
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_sat.f
- EXTRACT_FMT_SAT_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
+ EXTRACT_IFMT_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_SAT_CODE
+ EXTRACT_IFMT_SATB_CODE
/* Record the fields for the semantic handler. */
FLD (i_sr) = & CPU (h_gr)[f_r2];
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_sadd.f
- EXTRACT_FMT_SADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_SADD_CODE
+ EXTRACT_IFMT_NOP_CODE
/* Record the fields for the semantic handler. */
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_sadd", (char *) 0));
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_macwu1.f
- EXTRACT_FMT_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MACWU1_CODE
+ EXTRACT_IFMT_CMP_CODE
/* Record the fields for the semantic handler. */
FLD (i_src1) = & CPU (h_gr)[f_r1];
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_msblo.f
- EXTRACT_FMT_MSBLO_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MSBLO_CODE
+ EXTRACT_IFMT_CMP_CODE
/* Record the fields for the semantic handler. */
FLD (i_src1) = & CPU (h_gr)[f_r1];
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_mulwu1.f
- EXTRACT_FMT_MULWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MULWU1_CODE
+ EXTRACT_IFMT_CMP_CODE
/* Record the fields for the semantic handler. */
FLD (i_src1) = & CPU (h_gr)[f_r1];
{
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.cti.fields.fmt_sc.f
- EXTRACT_FMT_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_IFMT_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_SC_CODE
+ EXTRACT_IFMT_NOP_CODE
/* Record the fields for the semantic handler. */
SEM_BRANCH_INIT_EXTRACT (abuf);
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_dr);
- sr = FLD (in_dr);
- referenced |= 1 << 0;
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src2 = FLD (in_src2);
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src2 = FLD (in_src2);
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src2 = FLD (in_src2);
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src2 = FLD (in_src2);
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src2 = FLD (in_src2);
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src2 = FLD (in_src2);
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src2 = FLD (in_src2);
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src2 = FLD (in_src2);
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src2 = FLD (in_src2);
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- sr = FLD (in_sr);
+ INT in_sr = -1;
+ in_sr = FLD (in_sr);
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- sr = FLD (in_sr);
+ INT in_sr = -1;
+ in_sr = FLD (in_sr);
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- sr = FLD (in_sr);
+ INT in_sr = -1;
+ in_sr = FLD (in_sr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- sr = FLD (in_sr);
+ INT in_sr = -1;
+ in_sr = FLD (in_sr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_sr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_dr = FLD (in_sr);
+ out_dr = FLD (out_sr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ out_dr = FLD (out_dr);
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ out_dr = FLD (out_dr);
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ out_dr = FLD (out_dr);
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ out_dr = FLD (out_dr);
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ out_dr = FLD (out_dr);
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ out_dr = FLD (out_dr);
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ out_dr = FLD (out_dr);
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_src1);
- referenced |= 1 << 0;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_src1);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_src1);
- referenced |= 1 << 0;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_src1);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
referenced |= 1 << 0;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ out_dr = FLD (out_dr);
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = 0;
- INT src2 = 0;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = 0;
+ INT in_src2 = 0;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = 0;
- INT src2 = 0;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = 0;
+ INT in_src2 = 0;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = 0;
- INT src2 = 0;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = 0;
+ INT in_src2 = 0;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = 0;
- INT src2 = 0;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = 0;
+ INT in_src2 = 0;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = 0;
- INT src2 = 0;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = 0;
+ INT in_src2 = 0;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = 0;
- INT src2 = 0;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = 0;
+ INT in_src2 = 0;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = 0;
- INT src2 = 0;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = 0;
+ INT in_src2 = 0;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_src2);
- sr = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, sr, sr2, dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_dr = FLD (in_src2);
+ out_dr = FLD (out_src2);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = 0;
- INT src2 = 0;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = 0;
+ INT in_src2 = 0;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_src2);
- sr = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, sr, sr2, dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_dr = FLD (in_src2);
+ out_dr = FLD (out_src2);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src2 = FLD (in_src2);
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
+Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
This file is part of the GNU Simulators.
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_empty.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_empty.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_empty.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_empty.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_empty.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_empty.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_add.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_add3.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_add.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_and3.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_add.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_or3.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_add.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_and3.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_addi.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_addv.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_addv3.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
do {
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_addx.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_bc8.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_bc24.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_beq.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_bl8.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_bl24.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_bcl8.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_bcl24.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_bc8.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_bc24.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_beq.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_bra8.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_bra24.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_bcl8.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_bcl24.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_cmp.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_cmpi.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_cmp.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_cmpi.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_cmp.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_cmpz.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_div.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (NESI (* FLD (i_sr), 0)) {
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_div.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (NESI (* FLD (i_sr), 0)) {
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_div.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (NESI (* FLD (i_sr), 0)) {
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_div.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (NESI (* FLD (i_sr), 0)) {
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_div.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
if (NESI (* FLD (i_sr), 0)) {
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_jc.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_jc.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_jl.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_ld.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_ld_d.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_ldb.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_ldb_d.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_ldh.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_ldh_d.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_ldb.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_ldb_d.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_ldh.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_ldh_d.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_ld_plus.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_ld24.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_ldi8.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_ldi16.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_lock.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_machi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- DI opval = SRADI (SLLDI (ADDDI (m32rxf_h_accums_get (current_cpu, FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
- m32rxf_h_accums_set (current_cpu, FLD (f_acc), opval);
+ DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
+ SET_H_ACCUMS (FLD (f_acc), opval);
TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
}
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_machi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- DI opval = SRADI (SLLDI (ADDDI (m32rxf_h_accums_get (current_cpu, FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
- m32rxf_h_accums_set (current_cpu, FLD (f_acc), opval);
+ DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
+ SET_H_ACCUMS (FLD (f_acc), opval);
TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
}
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_machi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- DI opval = ADDDI (m32rxf_h_accums_get (current_cpu, FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))));
- m32rxf_h_accums_set (current_cpu, FLD (f_acc), opval);
+ DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))));
+ SET_H_ACCUMS (FLD (f_acc), opval);
TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
}
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_machi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- DI opval = ADDDI (m32rxf_h_accums_get (current_cpu, FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))));
- m32rxf_h_accums_set (current_cpu, FLD (f_acc), opval);
+ DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))));
+ SET_H_ACCUMS (FLD (f_acc), opval);
TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
}
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_add.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_mulhi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
- m32rxf_h_accums_set (current_cpu, FLD (f_acc), opval);
+ SET_H_ACCUMS (FLD (f_acc), opval);
TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
}
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_mulhi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
- m32rxf_h_accums_set (current_cpu, FLD (f_acc), opval);
+ SET_H_ACCUMS (FLD (f_acc), opval);
TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
}
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_mulhi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))));
- m32rxf_h_accums_set (current_cpu, FLD (f_acc), opval);
+ SET_H_ACCUMS (FLD (f_acc), opval);
TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
}
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_mulhi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))));
- m32rxf_h_accums_set (current_cpu, FLD (f_acc), opval);
+ SET_H_ACCUMS (FLD (f_acc), opval);
TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
}
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_mv.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_mvfachi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- SI opval = TRUNCDISI (SRADI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)), 32));
+ SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
}
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_mvfachi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- SI opval = TRUNCDISI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)));
+ SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs)));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
}
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_mvfachi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- SI opval = TRUNCDISI (SRADI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)), 16));
+ SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
}
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_mvfc.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- SI opval = m32rxf_h_cr_get (current_cpu, FLD (f_r2));
+ SI opval = GET_H_CR (FLD (f_r2));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
}
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_mvtachi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- DI opval = ORDI (ANDDI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
- m32rxf_h_accums_set (current_cpu, FLD (f_accs), opval);
+ DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
+ SET_H_ACCUMS (FLD (f_accs), opval);
TRACE_RESULT (current_cpu, abuf, "accs", 'D', opval);
}
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_mvtachi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- DI opval = ORDI (ANDDI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
- m32rxf_h_accums_set (current_cpu, FLD (f_accs), opval);
+ DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
+ SET_H_ACCUMS (FLD (f_accs), opval);
TRACE_RESULT (current_cpu, abuf, "accs", 'D', opval);
}
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_mvtc.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
USI opval = * FLD (i_sr);
- m32rxf_h_cr_set (current_cpu, FLD (f_r1), opval);
+ SET_H_CR (FLD (f_r1), opval);
TRACE_RESULT (current_cpu, abuf, "dcr", 'x', opval);
}
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_mv.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_nop.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_mv.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_rac_dsi.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
DI tmp_tmp1;
- tmp_tmp1 = SLLDI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)), FLD (f_imm1));
+ tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
{
DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
- m32rxf_h_accums_set (current_cpu, FLD (f_accd), opval);
+ SET_H_ACCUMS (FLD (f_accd), opval);
TRACE_RESULT (current_cpu, abuf, "accd", 'D', opval);
}
} while (0);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_rac_dsi.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
DI tmp_tmp1;
- tmp_tmp1 = SLLDI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)), FLD (f_imm1));
+ tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000));
{
DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0)));
- m32rxf_h_accums_set (current_cpu, FLD (f_accd), opval);
+ SET_H_ACCUMS (FLD (f_accd), opval);
TRACE_RESULT (current_cpu, abuf, "accd", 'D', opval);
}
} while (0);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_rte.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
{
- USI opval = ANDSI (m32rxf_h_cr_get (current_cpu, ((UINT) 6)), -4);
+ USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
{
- USI opval = m32rxf_h_cr_get (current_cpu, ((UINT) 14));
- m32rxf_h_cr_set (current_cpu, ((UINT) 6), opval);
+ USI opval = GET_H_CR (((UINT) 14));
+ SET_H_CR (((UINT) 6), opval);
TRACE_RESULT (current_cpu, abuf, "cr-6", 'x', opval);
}
{
UQI opval = CPU (h_bpsw);
- m32rxf_h_psw_set (current_cpu, opval);
+ SET_H_PSW (opval);
TRACE_RESULT (current_cpu, abuf, "psw-0", 'x', opval);
}
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_seth.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_add.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_sll3.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_slli.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_add.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_sll3.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_slli.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_add.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_sll3.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_slli.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_st.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_st_d.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_stb.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_stb_d.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_sth.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_sth_d.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_st_plus.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_st_plus.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_add.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_addv.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_addx.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_trap.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
{
- USI opval = m32rxf_h_cr_get (current_cpu, ((UINT) 6));
- m32rxf_h_cr_set (current_cpu, ((UINT) 14), opval);
+ USI opval = GET_H_CR (((UINT) 6));
+ SET_H_CR (((UINT) 14), opval);
TRACE_RESULT (current_cpu, abuf, "cr-14", 'x', opval);
}
{
USI opval = ADDSI (pc, 4);
- m32rxf_h_cr_set (current_cpu, ((UINT) 6), opval);
+ SET_H_CR (((UINT) 6), opval);
TRACE_RESULT (current_cpu, abuf, "cr-6", 'x', opval);
}
{
TRACE_RESULT (current_cpu, abuf, "bbpsw-0", 'x', opval);
}
{
- UQI opval = m32rxf_h_psw_get (current_cpu);
+ UQI opval = GET_H_PSW ();
CPU (h_bpsw) = opval;
TRACE_RESULT (current_cpu, abuf, "bpsw-0", 'x', opval);
}
{
- UQI opval = ANDQI (m32rxf_h_psw_get (current_cpu), 128);
- m32rxf_h_psw_set (current_cpu, opval);
+ UQI opval = ANDQI (GET_H_PSW (), 128);
+ SET_H_PSW (opval);
TRACE_RESULT (current_cpu, abuf, "psw-0", 'x', opval);
}
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_unlock.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
{
SI opval = * FLD (i_src1);
SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
- written |= (1 << 3);
+ written |= (1 << 4);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_satb.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_satb.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_sat.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_cmpz.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_sadd.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- DI opval = ADDDI (SRADI (m32rxf_h_accums_get (current_cpu, ((UINT) 1)), 16), m32rxf_h_accums_get (current_cpu, ((UINT) 0)));
- m32rxf_h_accums_set (current_cpu, ((UINT) 0), opval);
+ DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0)));
+ SET_H_ACCUMS (((UINT) 0), opval);
TRACE_RESULT (current_cpu, abuf, "accums-0", 'D', opval);
}
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_macwu1.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- DI opval = SRADI (SLLDI (ADDDI (m32rxf_h_accums_get (current_cpu, ((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8);
- m32rxf_h_accums_set (current_cpu, ((UINT) 1), opval);
+ DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8);
+ SET_H_ACCUMS (((UINT) 1), opval);
TRACE_RESULT (current_cpu, abuf, "accums-1", 'D', opval);
}
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_msblo.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- DI opval = SRADI (SLLDI (SUBDI (m32rxf_h_accum_get (current_cpu), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8);
- m32rxf_h_accum_set (current_cpu, opval);
+ DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8);
+ SET_H_ACCUM (opval);
TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
}
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_mulwu1.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16);
- m32rxf_h_accums_set (current_cpu, ((UINT) 1), opval);
+ SET_H_ACCUMS (((UINT) 1), opval);
TRACE_RESULT (current_cpu, abuf, "accums-1", 'D', opval);
}
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.fmt_macwu1.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- DI opval = SRADI (SLLDI (ADDDI (m32rxf_h_accums_get (current_cpu, ((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8);
- m32rxf_h_accums_set (current_cpu, ((UINT) 1), opval);
+ DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8);
+ SET_H_ACCUMS (((UINT) 1), opval);
TRACE_RESULT (current_cpu, abuf, "accums-1", 'D', opval);
}
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_sc.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
#define FLD(f) abuf->fields.cti.fields.fmt_sc.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
#define FLD(f) abuf->fields.fmt_add.f
#define OPRND(f) par_exec->operands.fmt_add.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_add.f
#define OPRND(f) par_exec->operands.fmt_add.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_add.f
#define OPRND(f) par_exec->operands.fmt_add.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_add.f
#define OPRND(f) par_exec->operands.fmt_add.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_add.f
#define OPRND(f) par_exec->operands.fmt_add.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_add.f
#define OPRND(f) par_exec->operands.fmt_add.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_add.f
#define OPRND(f) par_exec->operands.fmt_add.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_add.f
#define OPRND(f) par_exec->operands.fmt_add.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_addi.f
#define OPRND(f) par_exec->operands.fmt_addi.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_addi.f
#define OPRND(f) par_exec->operands.fmt_addi.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_addv.f
#define OPRND(f) par_exec->operands.fmt_addv.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
#define FLD(f) abuf->fields.fmt_addv.f
#define OPRND(f) par_exec->operands.fmt_addv.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- * FLD (i_dr) = OPRND (dr);
CPU (h_cond) = OPRND (condbit);
+ * FLD (i_dr) = OPRND (dr);
#undef OPRND
#undef FLD
#define FLD(f) abuf->fields.fmt_addx.f
#define OPRND(f) par_exec->operands.fmt_addx.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
#define FLD(f) abuf->fields.fmt_addx.f
#define OPRND(f) par_exec->operands.fmt_addx.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- * FLD (i_dr) = OPRND (dr);
CPU (h_cond) = OPRND (condbit);
+ * FLD (i_dr) = OPRND (dr);
#undef OPRND
#undef FLD
#define FLD(f) abuf->fields.cti.fields.fmt_bc8.f
#define OPRND(f) par_exec->operands.fmt_bc8.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
if (CPU (h_cond)) {
#define FLD(f) abuf->fields.cti.fields.fmt_bc8.f
#define OPRND(f) par_exec->operands.fmt_bc8.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
#define FLD(f) abuf->fields.cti.fields.fmt_bl8.f
#define OPRND(f) par_exec->operands.fmt_bl8.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
#define FLD(f) abuf->fields.cti.fields.fmt_bl8.f
#define OPRND(f) par_exec->operands.fmt_bl8.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
#define FLD(f) abuf->fields.cti.fields.fmt_bcl8.f
#define OPRND(f) par_exec->operands.fmt_bcl8.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
if (CPU (h_cond)) {
#define FLD(f) abuf->fields.cti.fields.fmt_bcl8.f
#define OPRND(f) par_exec->operands.fmt_bcl8.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
#define FLD(f) abuf->fields.cti.fields.fmt_bc8.f
#define OPRND(f) par_exec->operands.fmt_bc8.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
if (NOTBI (CPU (h_cond))) {
#define FLD(f) abuf->fields.cti.fields.fmt_bc8.f
#define OPRND(f) par_exec->operands.fmt_bc8.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
#define FLD(f) abuf->fields.cti.fields.fmt_bra8.f
#define OPRND(f) par_exec->operands.fmt_bra8.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.cti.fields.fmt_bra8.f
#define OPRND(f) par_exec->operands.fmt_bra8.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
#define FLD(f) abuf->fields.cti.fields.fmt_bcl8.f
#define OPRND(f) par_exec->operands.fmt_bcl8.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
if (NOTBI (CPU (h_cond))) {
#define FLD(f) abuf->fields.cti.fields.fmt_bcl8.f
#define OPRND(f) par_exec->operands.fmt_bcl8.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
#define FLD(f) abuf->fields.fmt_cmp.f
#define OPRND(f) par_exec->operands.fmt_cmp.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_cmp.f
#define OPRND(f) par_exec->operands.fmt_cmp.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
CPU (h_cond) = OPRND (condbit);
#define FLD(f) abuf->fields.fmt_cmp.f
#define OPRND(f) par_exec->operands.fmt_cmp.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_cmp.f
#define OPRND(f) par_exec->operands.fmt_cmp.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
CPU (h_cond) = OPRND (condbit);
#define FLD(f) abuf->fields.fmt_cmp.f
#define OPRND(f) par_exec->operands.fmt_cmp.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_cmp.f
#define OPRND(f) par_exec->operands.fmt_cmp.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
CPU (h_cond) = OPRND (condbit);
#define FLD(f) abuf->fields.fmt_cmpz.f
#define OPRND(f) par_exec->operands.fmt_cmpz.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_cmpz.f
#define OPRND(f) par_exec->operands.fmt_cmpz.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
CPU (h_cond) = OPRND (condbit);
#define FLD(f) abuf->fields.cti.fields.fmt_jc.f
#define OPRND(f) par_exec->operands.fmt_jc.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
if (CPU (h_cond)) {
#define FLD(f) abuf->fields.cti.fields.fmt_jc.f
#define OPRND(f) par_exec->operands.fmt_jc.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
#define FLD(f) abuf->fields.cti.fields.fmt_jc.f
#define OPRND(f) par_exec->operands.fmt_jc.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
if (NOTBI (CPU (h_cond))) {
#define FLD(f) abuf->fields.cti.fields.fmt_jc.f
#define OPRND(f) par_exec->operands.fmt_jc.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
#define FLD(f) abuf->fields.cti.fields.fmt_jl.f
#define OPRND(f) par_exec->operands.fmt_jl.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
#define FLD(f) abuf->fields.cti.fields.fmt_jl.f
#define OPRND(f) par_exec->operands.fmt_jl.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f
#define OPRND(f) par_exec->operands.fmt_jmp.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f
#define OPRND(f) par_exec->operands.fmt_jmp.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
#define FLD(f) abuf->fields.fmt_ld.f
#define OPRND(f) par_exec->operands.fmt_ld.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_ld.f
#define OPRND(f) par_exec->operands.fmt_ld.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_ldb.f
#define OPRND(f) par_exec->operands.fmt_ldb.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_ldb.f
#define OPRND(f) par_exec->operands.fmt_ldb.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_ldh.f
#define OPRND(f) par_exec->operands.fmt_ldh.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_ldh.f
#define OPRND(f) par_exec->operands.fmt_ldh.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_ldb.f
#define OPRND(f) par_exec->operands.fmt_ldb.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_ldb.f
#define OPRND(f) par_exec->operands.fmt_ldb.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_ldh.f
#define OPRND(f) par_exec->operands.fmt_ldh.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_ldh.f
#define OPRND(f) par_exec->operands.fmt_ldh.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_ld_plus.f
#define OPRND(f) par_exec->operands.fmt_ld_plus.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
#define FLD(f) abuf->fields.fmt_ld_plus.f
#define OPRND(f) par_exec->operands.fmt_ld_plus.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_ldi8.f
#define OPRND(f) par_exec->operands.fmt_ldi8.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_ldi8.f
#define OPRND(f) par_exec->operands.fmt_ldi8.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_lock.f
#define OPRND(f) par_exec->operands.fmt_lock.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
#define FLD(f) abuf->fields.fmt_lock.f
#define OPRND(f) par_exec->operands.fmt_lock.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- CPU (h_lock) = OPRND (h_lock_0);
* FLD (i_dr) = OPRND (dr);
+ CPU (h_lock) = OPRND (h_lock_0);
#undef OPRND
#undef FLD
#define FLD(f) abuf->fields.fmt_machi_a.f
#define OPRND(f) par_exec->operands.fmt_machi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- DI opval = SRADI (SLLDI (ADDDI (m32rxf_h_accums_get (current_cpu, FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
+ DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
OPRND (acc) = opval;
TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
}
#define FLD(f) abuf->fields.fmt_machi_a.f
#define OPRND(f) par_exec->operands.fmt_machi_a.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- m32rxf_h_accums_set (current_cpu, FLD (f_acc), OPRND (acc));
+ SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
#undef OPRND
#undef FLD
#define FLD(f) abuf->fields.fmt_machi_a.f
#define OPRND(f) par_exec->operands.fmt_machi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- DI opval = SRADI (SLLDI (ADDDI (m32rxf_h_accums_get (current_cpu, FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
+ DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
OPRND (acc) = opval;
TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
}
#define FLD(f) abuf->fields.fmt_machi_a.f
#define OPRND(f) par_exec->operands.fmt_machi_a.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- m32rxf_h_accums_set (current_cpu, FLD (f_acc), OPRND (acc));
+ SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
#undef OPRND
#undef FLD
#define FLD(f) abuf->fields.fmt_machi_a.f
#define OPRND(f) par_exec->operands.fmt_machi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- DI opval = ADDDI (m32rxf_h_accums_get (current_cpu, FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))));
+ DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))));
OPRND (acc) = opval;
TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
}
#define FLD(f) abuf->fields.fmt_machi_a.f
#define OPRND(f) par_exec->operands.fmt_machi_a.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- m32rxf_h_accums_set (current_cpu, FLD (f_acc), OPRND (acc));
+ SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
#undef OPRND
#undef FLD
#define FLD(f) abuf->fields.fmt_machi_a.f
#define OPRND(f) par_exec->operands.fmt_machi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- DI opval = ADDDI (m32rxf_h_accums_get (current_cpu, FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))));
+ DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))));
OPRND (acc) = opval;
TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
}
#define FLD(f) abuf->fields.fmt_machi_a.f
#define OPRND(f) par_exec->operands.fmt_machi_a.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- m32rxf_h_accums_set (current_cpu, FLD (f_acc), OPRND (acc));
+ SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
#undef OPRND
#undef FLD
#define FLD(f) abuf->fields.fmt_add.f
#define OPRND(f) par_exec->operands.fmt_add.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_add.f
#define OPRND(f) par_exec->operands.fmt_add.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_mulhi_a.f
#define OPRND(f) par_exec->operands.fmt_mulhi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_mulhi_a.f
#define OPRND(f) par_exec->operands.fmt_mulhi_a.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- m32rxf_h_accums_set (current_cpu, FLD (f_acc), OPRND (acc));
+ SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
#undef OPRND
#undef FLD
#define FLD(f) abuf->fields.fmt_mulhi_a.f
#define OPRND(f) par_exec->operands.fmt_mulhi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_mulhi_a.f
#define OPRND(f) par_exec->operands.fmt_mulhi_a.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- m32rxf_h_accums_set (current_cpu, FLD (f_acc), OPRND (acc));
+ SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
#undef OPRND
#undef FLD
#define FLD(f) abuf->fields.fmt_mulhi_a.f
#define OPRND(f) par_exec->operands.fmt_mulhi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_mulhi_a.f
#define OPRND(f) par_exec->operands.fmt_mulhi_a.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- m32rxf_h_accums_set (current_cpu, FLD (f_acc), OPRND (acc));
+ SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
#undef OPRND
#undef FLD
#define FLD(f) abuf->fields.fmt_mulhi_a.f
#define OPRND(f) par_exec->operands.fmt_mulhi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_mulhi_a.f
#define OPRND(f) par_exec->operands.fmt_mulhi_a.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- m32rxf_h_accums_set (current_cpu, FLD (f_acc), OPRND (acc));
+ SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
#undef OPRND
#undef FLD
#define FLD(f) abuf->fields.fmt_mv.f
#define OPRND(f) par_exec->operands.fmt_mv.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_mv.f
#define OPRND(f) par_exec->operands.fmt_mv.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_mvfachi_a.f
#define OPRND(f) par_exec->operands.fmt_mvfachi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- SI opval = TRUNCDISI (SRADI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)), 32));
+ SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32));
OPRND (dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
}
#define FLD(f) abuf->fields.fmt_mvfachi_a.f
#define OPRND(f) par_exec->operands.fmt_mvfachi_a.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_mvfachi_a.f
#define OPRND(f) par_exec->operands.fmt_mvfachi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- SI opval = TRUNCDISI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)));
+ SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs)));
OPRND (dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
}
#define FLD(f) abuf->fields.fmt_mvfachi_a.f
#define OPRND(f) par_exec->operands.fmt_mvfachi_a.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_mvfachi_a.f
#define OPRND(f) par_exec->operands.fmt_mvfachi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- SI opval = TRUNCDISI (SRADI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)), 16));
+ SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16));
OPRND (dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
}
#define FLD(f) abuf->fields.fmt_mvfachi_a.f
#define OPRND(f) par_exec->operands.fmt_mvfachi_a.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_mvfc.f
#define OPRND(f) par_exec->operands.fmt_mvfc.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- SI opval = m32rxf_h_cr_get (current_cpu, FLD (f_r2));
+ SI opval = GET_H_CR (FLD (f_r2));
OPRND (dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
}
#define FLD(f) abuf->fields.fmt_mvfc.f
#define OPRND(f) par_exec->operands.fmt_mvfc.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_mvtachi_a.f
#define OPRND(f) par_exec->operands.fmt_mvtachi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- DI opval = ORDI (ANDDI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
+ DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
OPRND (accs) = opval;
TRACE_RESULT (current_cpu, abuf, "accs", 'D', opval);
}
#define FLD(f) abuf->fields.fmt_mvtachi_a.f
#define OPRND(f) par_exec->operands.fmt_mvtachi_a.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- m32rxf_h_accums_set (current_cpu, FLD (f_accs), OPRND (accs));
+ SET_H_ACCUMS (FLD (f_accs), OPRND (accs));
#undef OPRND
#undef FLD
#define FLD(f) abuf->fields.fmt_mvtachi_a.f
#define OPRND(f) par_exec->operands.fmt_mvtachi_a.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- DI opval = ORDI (ANDDI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
+ DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
OPRND (accs) = opval;
TRACE_RESULT (current_cpu, abuf, "accs", 'D', opval);
}
#define FLD(f) abuf->fields.fmt_mvtachi_a.f
#define OPRND(f) par_exec->operands.fmt_mvtachi_a.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- m32rxf_h_accums_set (current_cpu, FLD (f_accs), OPRND (accs));
+ SET_H_ACCUMS (FLD (f_accs), OPRND (accs));
#undef OPRND
#undef FLD
#define FLD(f) abuf->fields.fmt_mvtc.f
#define OPRND(f) par_exec->operands.fmt_mvtc.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_mvtc.f
#define OPRND(f) par_exec->operands.fmt_mvtc.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- m32rxf_h_cr_set (current_cpu, FLD (f_r1), OPRND (dcr));
+ SET_H_CR (FLD (f_r1), OPRND (dcr));
#undef OPRND
#undef FLD
#define FLD(f) abuf->fields.fmt_mv.f
#define OPRND(f) par_exec->operands.fmt_mv.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_mv.f
#define OPRND(f) par_exec->operands.fmt_mv.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_nop.f
#define OPRND(f) par_exec->operands.fmt_nop.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
#define FLD(f) abuf->fields.fmt_nop.f
#define OPRND(f) par_exec->operands.fmt_nop.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
#define FLD(f) abuf->fields.fmt_mv.f
#define OPRND(f) par_exec->operands.fmt_mv.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_mv.f
#define OPRND(f) par_exec->operands.fmt_mv.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_rac_dsi.f
#define OPRND(f) par_exec->operands.fmt_rac_dsi.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
DI tmp_tmp1;
- tmp_tmp1 = SLLDI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)), FLD (f_imm1));
+ tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
{
DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
#define FLD(f) abuf->fields.fmt_rac_dsi.f
#define OPRND(f) par_exec->operands.fmt_rac_dsi.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- m32rxf_h_accums_set (current_cpu, FLD (f_accd), OPRND (accd));
+ SET_H_ACCUMS (FLD (f_accd), OPRND (accd));
#undef OPRND
#undef FLD
#define FLD(f) abuf->fields.fmt_rac_dsi.f
#define OPRND(f) par_exec->operands.fmt_rac_dsi.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
DI tmp_tmp1;
- tmp_tmp1 = SLLDI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)), FLD (f_imm1));
+ tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000));
{
DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0)));
#define FLD(f) abuf->fields.fmt_rac_dsi.f
#define OPRND(f) par_exec->operands.fmt_rac_dsi.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- m32rxf_h_accums_set (current_cpu, FLD (f_accd), OPRND (accd));
+ SET_H_ACCUMS (FLD (f_accd), OPRND (accd));
#undef OPRND
#undef FLD
#define FLD(f) abuf->fields.cti.fields.fmt_rte.f
#define OPRND(f) par_exec->operands.fmt_rte.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
{
- USI opval = ANDSI (m32rxf_h_cr_get (current_cpu, ((UINT) 6)), -4);
+ USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
OPRND (pc) = opval;
TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
}
{
- USI opval = m32rxf_h_cr_get (current_cpu, ((UINT) 14));
+ USI opval = GET_H_CR (((UINT) 14));
OPRND (h_cr_6) = opval;
TRACE_RESULT (current_cpu, abuf, "cr-6", 'x', opval);
}
#define FLD(f) abuf->fields.cti.fields.fmt_rte.f
#define OPRND(f) par_exec->operands.fmt_rte.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
- m32rxf_h_cr_set (current_cpu, ((UINT) 6), OPRND (h_cr_6));
- m32rxf_h_psw_set (current_cpu, OPRND (h_psw_0));
CPU (h_bpsw) = OPRND (h_bpsw_0);
+ SET_H_CR (((UINT) 6), OPRND (h_cr_6));
+ SET_H_PSW (OPRND (h_psw_0));
+ SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
SEM_BRANCH_FINI (vpc);
#undef OPRND
#define FLD(f) abuf->fields.fmt_add.f
#define OPRND(f) par_exec->operands.fmt_add.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_add.f
#define OPRND(f) par_exec->operands.fmt_add.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_slli.f
#define OPRND(f) par_exec->operands.fmt_slli.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_slli.f
#define OPRND(f) par_exec->operands.fmt_slli.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_add.f
#define OPRND(f) par_exec->operands.fmt_add.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_add.f
#define OPRND(f) par_exec->operands.fmt_add.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_slli.f
#define OPRND(f) par_exec->operands.fmt_slli.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_slli.f
#define OPRND(f) par_exec->operands.fmt_slli.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_add.f
#define OPRND(f) par_exec->operands.fmt_add.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_add.f
#define OPRND(f) par_exec->operands.fmt_add.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_slli.f
#define OPRND(f) par_exec->operands.fmt_slli.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_slli.f
#define OPRND(f) par_exec->operands.fmt_slli.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_st.f
#define OPRND(f) par_exec->operands.fmt_st.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_st.f
#define OPRND(f) par_exec->operands.fmt_st.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
SETMEMSI (current_cpu, pc, OPRND (h_memory_src2_idx), OPRND (h_memory_src2));
#define FLD(f) abuf->fields.fmt_stb.f
#define OPRND(f) par_exec->operands.fmt_stb.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_stb.f
#define OPRND(f) par_exec->operands.fmt_stb.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
SETMEMQI (current_cpu, pc, OPRND (h_memory_src2_idx), OPRND (h_memory_src2));
#define FLD(f) abuf->fields.fmt_sth.f
#define OPRND(f) par_exec->operands.fmt_sth.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_sth.f
#define OPRND(f) par_exec->operands.fmt_sth.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
SETMEMHI (current_cpu, pc, OPRND (h_memory_src2_idx), OPRND (h_memory_src2));
#define FLD(f) abuf->fields.fmt_st_plus.f
#define OPRND(f) par_exec->operands.fmt_st_plus.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
#define FLD(f) abuf->fields.fmt_st_plus.f
#define OPRND(f) par_exec->operands.fmt_st_plus.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
SETMEMSI (current_cpu, pc, OPRND (h_memory_new_src2_idx), OPRND (h_memory_new_src2));
#define FLD(f) abuf->fields.fmt_st_plus.f
#define OPRND(f) par_exec->operands.fmt_st_plus.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
#define FLD(f) abuf->fields.fmt_st_plus.f
#define OPRND(f) par_exec->operands.fmt_st_plus.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
SETMEMSI (current_cpu, pc, OPRND (h_memory_new_src2_idx), OPRND (h_memory_new_src2));
#define FLD(f) abuf->fields.fmt_add.f
#define OPRND(f) par_exec->operands.fmt_add.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_add.f
#define OPRND(f) par_exec->operands.fmt_add.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
* FLD (i_dr) = OPRND (dr);
#define FLD(f) abuf->fields.fmt_addv.f
#define OPRND(f) par_exec->operands.fmt_addv.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
#define FLD(f) abuf->fields.fmt_addv.f
#define OPRND(f) par_exec->operands.fmt_addv.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- * FLD (i_dr) = OPRND (dr);
CPU (h_cond) = OPRND (condbit);
+ * FLD (i_dr) = OPRND (dr);
#undef OPRND
#undef FLD
#define FLD(f) abuf->fields.fmt_addx.f
#define OPRND(f) par_exec->operands.fmt_addx.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
#define FLD(f) abuf->fields.fmt_addx.f
#define OPRND(f) par_exec->operands.fmt_addx.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- * FLD (i_dr) = OPRND (dr);
CPU (h_cond) = OPRND (condbit);
+ * FLD (i_dr) = OPRND (dr);
#undef OPRND
#undef FLD
#define FLD(f) abuf->fields.cti.fields.fmt_trap.f
#define OPRND(f) par_exec->operands.fmt_trap.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
{
- USI opval = m32rxf_h_cr_get (current_cpu, ((UINT) 6));
+ USI opval = GET_H_CR (((UINT) 6));
OPRND (h_cr_14) = opval;
TRACE_RESULT (current_cpu, abuf, "cr-14", 'x', opval);
}
TRACE_RESULT (current_cpu, abuf, "bbpsw-0", 'x', opval);
}
{
- UQI opval = m32rxf_h_psw_get (current_cpu);
+ UQI opval = GET_H_PSW ();
OPRND (h_bpsw_0) = opval;
TRACE_RESULT (current_cpu, abuf, "bpsw-0", 'x', opval);
}
{
- UQI opval = ANDQI (m32rxf_h_psw_get (current_cpu), 128);
+ UQI opval = ANDQI (GET_H_PSW (), 128);
OPRND (h_psw_0) = opval;
TRACE_RESULT (current_cpu, abuf, "psw-0", 'x', opval);
}
#define FLD(f) abuf->fields.cti.fields.fmt_trap.f
#define OPRND(f) par_exec->operands.fmt_trap.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- m32rxf_h_cr_set (current_cpu, ((UINT) 14), OPRND (h_cr_14));
- m32rxf_h_cr_set (current_cpu, ((UINT) 6), OPRND (h_cr_6));
CPU (h_bbpsw) = OPRND (h_bbpsw_0);
CPU (h_bpsw) = OPRND (h_bpsw_0);
- m32rxf_h_psw_set (current_cpu, OPRND (h_psw_0));
+ SET_H_CR (((UINT) 14), OPRND (h_cr_14));
+ SET_H_CR (((UINT) 6), OPRND (h_cr_6));
+ SET_H_PSW (OPRND (h_psw_0));
SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
SEM_BRANCH_FINI (vpc);
#define FLD(f) abuf->fields.fmt_unlock.f
#define OPRND(f) par_exec->operands.fmt_unlock.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
do {
SI opval = * FLD (i_src1);
OPRND (h_memory_src2_idx) = * FLD (i_src2);
OPRND (h_memory_src2) = opval;
- written |= (1 << 3);
+ written |= (1 << 4);
TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
}
}
#define FLD(f) abuf->fields.fmt_unlock.f
#define OPRND(f) par_exec->operands.fmt_unlock.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- if (written & (1 << 3))
+ CPU (h_lock) = OPRND (h_lock_0);
+ if (written & (1 << 4))
{
SETMEMSI (current_cpu, pc, OPRND (h_memory_src2_idx), OPRND (h_memory_src2));
}
- CPU (h_lock) = OPRND (h_lock_0);
#undef OPRND
#undef FLD
#define FLD(f) abuf->fields.fmt_cmpz.f
#define OPRND(f) par_exec->operands.fmt_cmpz.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_cmpz.f
#define OPRND(f) par_exec->operands.fmt_cmpz.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
CPU (h_cond) = OPRND (condbit);
#define FLD(f) abuf->fields.fmt_sadd.f
#define OPRND(f) par_exec->operands.fmt_sadd.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- DI opval = ADDDI (SRADI (m32rxf_h_accums_get (current_cpu, ((UINT) 1)), 16), m32rxf_h_accums_get (current_cpu, ((UINT) 0)));
+ DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0)));
OPRND (h_accums_0) = opval;
TRACE_RESULT (current_cpu, abuf, "accums-0", 'D', opval);
}
#define FLD(f) abuf->fields.fmt_sadd.f
#define OPRND(f) par_exec->operands.fmt_sadd.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- m32rxf_h_accums_set (current_cpu, ((UINT) 0), OPRND (h_accums_0));
+ SET_H_ACCUMS (((UINT) 0), OPRND (h_accums_0));
#undef OPRND
#undef FLD
#define FLD(f) abuf->fields.fmt_macwu1.f
#define OPRND(f) par_exec->operands.fmt_macwu1.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- DI opval = SRADI (SLLDI (ADDDI (m32rxf_h_accums_get (current_cpu, ((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8);
+ DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8);
OPRND (h_accums_1) = opval;
TRACE_RESULT (current_cpu, abuf, "accums-1", 'D', opval);
}
#define FLD(f) abuf->fields.fmt_macwu1.f
#define OPRND(f) par_exec->operands.fmt_macwu1.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- m32rxf_h_accums_set (current_cpu, ((UINT) 1), OPRND (h_accums_1));
+ SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_1));
#undef OPRND
#undef FLD
#define FLD(f) abuf->fields.fmt_msblo.f
#define OPRND(f) par_exec->operands.fmt_msblo.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- DI opval = SRADI (SLLDI (SUBDI (m32rxf_h_accum_get (current_cpu), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8);
+ DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8);
OPRND (accum) = opval;
TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
}
#define FLD(f) abuf->fields.fmt_msblo.f
#define OPRND(f) par_exec->operands.fmt_msblo.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- m32rxf_h_accum_set (current_cpu, OPRND (accum));
+ SET_H_ACCUM (OPRND (accum));
#undef OPRND
#undef FLD
#define FLD(f) abuf->fields.fmt_mulwu1.f
#define OPRND(f) par_exec->operands.fmt_mulwu1.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
#define FLD(f) abuf->fields.fmt_mulwu1.f
#define OPRND(f) par_exec->operands.fmt_mulwu1.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- m32rxf_h_accums_set (current_cpu, ((UINT) 1), OPRND (h_accums_1));
+ SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_1));
#undef OPRND
#undef FLD
#define FLD(f) abuf->fields.fmt_macwu1.f
#define OPRND(f) par_exec->operands.fmt_macwu1.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
- DI opval = SRADI (SLLDI (ADDDI (m32rxf_h_accums_get (current_cpu, ((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8);
+ DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8);
OPRND (h_accums_1) = opval;
TRACE_RESULT (current_cpu, abuf, "accums-1", 'D', opval);
}
#define FLD(f) abuf->fields.fmt_macwu1.f
#define OPRND(f) par_exec->operands.fmt_macwu1.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
- m32rxf_h_accums_set (current_cpu, ((UINT) 1), OPRND (h_accums_1));
+ SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_1));
#undef OPRND
#undef FLD
#define FLD(f) abuf->fields.cti.fields.fmt_sc.f
#define OPRND(f) par_exec->operands.fmt_sc.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
if (CPU (h_cond)) {
#define FLD(f) abuf->fields.cti.fields.fmt_sc.f
#define OPRND(f) par_exec->operands.fmt_sc.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
#define FLD(f) abuf->fields.cti.fields.fmt_sc.f
#define OPRND(f) par_exec->operands.fmt_sc.f
int UNUSED written = 0;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
if (NOTBI (CPU (h_cond))) {
#define FLD(f) abuf->fields.cti.fields.fmt_sc.f
#define OPRND(f) par_exec->operands.fmt_sc.f
int UNUSED written = abuf->written;
- PCADDR UNUSED pc = abuf->addr;
+ IADDR UNUSED pc = abuf->addr;
SEM_BRANCH_INIT
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
projects / external / binutils.git / commitdiff