pinctrl: baytrail: Use GENMASK() consistently
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Wed, 3 Jul 2019 15:15:54 +0000 (18:15 +0300)
committerLinus Walleij <linus.walleij@linaro.org>
Thu, 4 Jul 2019 07:58:13 +0000 (09:58 +0200)
Use GENMASK() macro for all definitions where it's appropriate.
No functional change intended.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190703151554.30454-1-andriy.shevchenko@linux.intel.com
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/intel/pinctrl-baytrail.c

index bfde1c7..e5a112a 100644 (file)
@@ -37,6 +37,7 @@
 /* BYT_CONF0_REG register bits */
 #define BYT_IODEN              BIT(31)
 #define BYT_DIRECT_IRQ_EN      BIT(27)
+#define BYT_TRIG_MASK          GENMASK(26, 24)
 #define BYT_TRIG_NEG           BIT(26)
 #define BYT_TRIG_POS           BIT(25)
 #define BYT_TRIG_LVL           BIT(24)
 #define BYT_GLITCH_F_SLOW_CLK  BIT(17)
 #define BYT_GLITCH_F_FAST_CLK  BIT(16)
 #define BYT_PULL_STR_SHIFT     9
-#define BYT_PULL_STR_MASK      (3 << BYT_PULL_STR_SHIFT)
+#define BYT_PULL_STR_MASK      GENMASK(10, 9)
 #define BYT_PULL_STR_2K                (0 << BYT_PULL_STR_SHIFT)
 #define BYT_PULL_STR_10K       (1 << BYT_PULL_STR_SHIFT)
 #define BYT_PULL_STR_20K       (2 << BYT_PULL_STR_SHIFT)
 #define BYT_PULL_STR_40K       (3 << BYT_PULL_STR_SHIFT)
 #define BYT_PULL_ASSIGN_SHIFT  7
-#define BYT_PULL_ASSIGN_MASK   (3 << BYT_PULL_ASSIGN_SHIFT)
+#define BYT_PULL_ASSIGN_MASK   GENMASK(8, 7)
 #define BYT_PULL_ASSIGN_UP     (1 << BYT_PULL_ASSIGN_SHIFT)
 #define BYT_PULL_ASSIGN_DOWN   (2 << BYT_PULL_ASSIGN_SHIFT)
-#define BYT_PIN_MUX            0x07
+#define BYT_PIN_MUX            GENMASK(2, 0)
 
 /* BYT_VAL_REG register bits */
+#define BYT_DIR_MASK           GENMASK(2, 1)
 #define BYT_INPUT_EN           BIT(2)  /* 0: input enabled (active low)*/
 #define BYT_OUTPUT_EN          BIT(1)  /* 0: output enabled (active low)*/
 #define BYT_LEVEL              BIT(0)
 
-#define BYT_DIR_MASK           (BIT(1) | BIT(2))
-#define BYT_TRIG_MASK          (BIT(26) | BIT(25) | BIT(24))
-
-#define BYT_CONF0_RESTORE_MASK (BYT_DIRECT_IRQ_EN | BYT_TRIG_MASK | \
-                                BYT_PIN_MUX)
+#define BYT_CONF0_RESTORE_MASK (BYT_DIRECT_IRQ_EN | BYT_TRIG_MASK | BYT_PIN_MUX)
 #define BYT_VAL_RESTORE_MASK   (BYT_DIR_MASK | BYT_LEVEL)
 
 /* BYT_DEBOUNCE_REG bits */
-#define BYT_DEBOUNCE_PULSE_MASK                0x7
+#define BYT_DEBOUNCE_PULSE_MASK                GENMASK(2, 0)
 #define BYT_DEBOUNCE_PULSE_375US       1
 #define BYT_DEBOUNCE_PULSE_750US       2
 #define BYT_DEBOUNCE_PULSE_1500US      3