dt-bingings: Update dt-bingings for jh7110 jpu/vdec.
authorsamin <samin.guo@starfivetech.com>
Tue, 23 Nov 2021 06:32:44 +0000 (14:32 +0800)
committersamin <samin.guo@starfivetech.com>
Tue, 23 Nov 2021 07:20:21 +0000 (15:20 +0800)
1) rename jpu/vdec match strings.
2) add axi/apb clock-names define for jpu/vdec.

Signed-off-by: samin <samin.guo@starfivetech.com>
arch/riscv/boot/dts/starfive/starfive_jh7110.dts

index ed60a99..4645d6f 100644 (file)
                        post-power-on-delay-ms = <200>;
                };
                jpu: jpu@11900000 {
-                   compatible = "cm,codaj12-jpu";
+                   compatible = "starfive,jpu";
                    reg = <0x0 0x13090000 0x0 0x300>;
                    interrupt-parent = <&plic>;
                    interrupts = <14>;
                    clocks = <&jpuclk>;
-                   clock-names = "jpege";
+                   clock-names = "axi_clk", "core_clk", "apb_clk";
                    status = "okay";
                };
 
                vpu_dec: vpu_dec@130A0000 {
-                   compatible = "c&m,cm511-vpu";
+                   compatible = "starfive,vdec";
                    reg = <0 0x130A0000 0 0x10000>;
                    interrupt-parent = <&plic>;
                    interrupts = <13>;
                    clocks = <&vdec_rootclk>;
-                   clock-names = "vcodec";
+                   clock-names = "axi_clk",
+                               "bpu_clk",
+                               "vce_clk",
+                               "apb_clk",
+                               "aximem_128b";
+                   //starfive,vdec_noc_ctrl;
                    status = "okay";
                };
                vpu_enc:vpu_enc@130B0000 {