sfc: get PIO buffer size from the NIC

[ Upstream commit c634700f7eec3c0da46e299cd0a0ae8b594f9b55 ]

The 8000 series SFC NICs have 4K PIO buffers, rather than the 2K of
 the 7000 series.  Rather than having a hard-coded PIO buffer size
 (ER_DZ_TX_PIOBUF_SIZE), read it from the GET_CAPABILITIES_V2 MCDI
 response.

Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/net/ethernet/sfc/ef10.c b/drivers/net/ethernet/sfc/ef10.c
index c4ada72..1d85109 100644 (file)
--- a/drivers/net/ethernet/sfc/ef10.c
+++ b/drivers/net/ethernet/sfc/ef10.c
@@ -197,11 +197,15 @@ static int efx_ef10_init_datapath_caps(struct efx_nic *efx)
        nic_data->datapath_caps =
                MCDI_DWORD(outbuf, GET_CAPABILITIES_OUT_FLAGS1);
 
-       if (outlen >= MC_CMD_GET_CAPABILITIES_V2_OUT_LEN)
+       if (outlen >= MC_CMD_GET_CAPABILITIES_V2_OUT_LEN) {
                nic_data->datapath_caps2 = MCDI_DWORD(outbuf,
                                GET_CAPABILITIES_V2_OUT_FLAGS2);
-       else
+               nic_data->piobuf_size = MCDI_WORD(outbuf,
+                               GET_CAPABILITIES_V2_OUT_SIZE_PIO_BUFF);
+       } else {
                nic_data->datapath_caps2 = 0;
+               nic_data->piobuf_size = ER_DZ_TX_PIOBUF_SIZE;
+       }
 
        /* record the DPCPU firmware IDs to determine VEB vswitching support.
         */
@@ -825,8 +829,8 @@ static int efx_ef10_link_piobufs(struct efx_nic *efx)
                        offset = ((efx->tx_channel_offset + efx->n_tx_channels -
                                   tx_queue->channel->channel - 1) *
                                  efx_piobuf_size);
-                       index = offset / ER_DZ_TX_PIOBUF_SIZE;
-                       offset = offset % ER_DZ_TX_PIOBUF_SIZE;
+                       index = offset / nic_data->piobuf_size;
+                       offset = offset % nic_data->piobuf_size;
 
                        /* When the host page size is 4K, the first
                         * host page in the WC mapping may be within
@@ -1161,11 +1165,11 @@ static int efx_ef10_dimension_resources(struct efx_nic *efx)
         * functions of the controller.
         */
        if (efx_piobuf_size != 0 &&
-           ER_DZ_TX_PIOBUF_SIZE / efx_piobuf_size * EF10_TX_PIOBUF_COUNT >=
+           nic_data->piobuf_size / efx_piobuf_size * EF10_TX_PIOBUF_COUNT >=
            efx->n_tx_channels) {
                unsigned int n_piobufs =
                        DIV_ROUND_UP(efx->n_tx_channels,
-                                    ER_DZ_TX_PIOBUF_SIZE / efx_piobuf_size);
+                                    nic_data->piobuf_size / efx_piobuf_size);
 
                rc = efx_ef10_alloc_piobufs(efx, n_piobufs);
                if (rc)

diff --git a/drivers/net/ethernet/sfc/nic.h b/drivers/net/ethernet/sfc/nic.h
index 73bee7e..73028f2 100644 (file)
--- a/drivers/net/ethernet/sfc/nic.h
+++ b/drivers/net/ethernet/sfc/nic.h
@@ -500,6 +500,7 @@ enum {
  * @pio_write_base: Base address for writing PIO buffers
  * @pio_write_vi_base: Relative VI number for @pio_write_base
  * @piobuf_handle: Handle of each PIO buffer allocated
+ * @piobuf_size: size of a single PIO buffer
  * @must_restore_piobufs: Flag: PIO buffers have yet to be restored after MC
  *     reboot
  * @rx_rss_context: Firmware handle for our RSS context
@@ -537,6 +538,7 @@ struct efx_ef10_nic_data {
        void __iomem *wc_membase, *pio_write_base;
        unsigned int pio_write_vi_base;
        unsigned int piobuf_handle[EF10_TX_PIOBUF_COUNT];
+       u16 piobuf_size;
        bool must_restore_piobufs;
        u32 rx_rss_context;
        bool rx_rss_context_exclusive;

diff --git a/drivers/net/ethernet/sfc/tx.c b/drivers/net/ethernet/sfc/tx.c
index 2337789..6f26acd 100644 (file)
--- a/drivers/net/ethernet/sfc/tx.c
+++ b/drivers/net/ethernet/sfc/tx.c
@@ -27,7 +27,6 @@
 
 #ifdef EFX_USE_PIO
 
-#define EFX_PIOBUF_SIZE_MAX ER_DZ_TX_PIOBUF_SIZE
 #define EFX_PIOBUF_SIZE_DEF ALIGN(256, L1_CACHE_BYTES)
 unsigned int efx_piobuf_size __read_mostly = EFX_PIOBUF_SIZE_DEF;