dtv_demod: tl1 DTMB, 674M frequency, not searchable [1/1]

PD#SWPL-12576

Problem:
dmd & dmx ts can't be synced

Solution:
change dmd ts sync to "searched"

Verify:
verified by t962x2_x301

Change-Id: I75014f746456b1dc8c7ffc57b98c92f5d001a6ec
Signed-off-by: zhiwei.yuan <zhiwei.yuan@amlogic.com>

diff --git a/drivers/amlogic/media/dtv_demod/amlfrontend.c b/drivers/amlogic/media/dtv_demod/amlfrontend.c
index f7a41ff..6a279a6 100644 (file)
--- a/drivers/amlogic/media/dtv_demod/amlfrontend.c
+++ b/drivers/amlogic/media/dtv_demod/amlfrontend.c
@@ -2551,6 +2551,9 @@ static int gxtv_demod_dtmb_set_frontend(struct dvb_frontend *fe)
        struct aml_demod_dtmb param;
        int times;
 
+       if (!demod_thread)
+               return 0;
+
        times = 2;
        PR_DBG("gxtv_demod_dtmb_set_frontend,freq is %d\n", c->frequency);
        memset(&param, 0, sizeof(param));

diff --git a/drivers/amlogic/media/dtv_demod/dtmb_func.c b/drivers/amlogic/media/dtv_demod/dtmb_func.c
index 64562de..f9d1f9d 100644 (file)
--- a/drivers/amlogic/media/dtv_demod/dtmb_func.c
+++ b/drivers/amlogic/media/dtv_demod/dtmb_func.c
@@ -151,8 +151,10 @@ void dtmb_all_reset(void)
                        dtmb_write_reg(0x5b << 2, 0x4d6a0a25);
                }
 
-               /*for timeshift mosaic issue*/
-               dtmb_write_reg(0x4e << 2, 0x256cf604);
+               /*for timeshift mosaic issue
+                *bit 30:ts_sync_sel,0=ts_sync,1=searched ts_sync
+                */
+               dtmb_write_reg(DTMB_FRONT_4e_CONFIG, 0x656cf604);
 
                /*delay fec lock & make fec lost faster
                 *to prevent eq is confused by signal

diff --git a/drivers/amlogic/media/dtv_demod/include/addr_dtmb_front.h b/drivers/amlogic/media/dtv_demod/include/addr_dtmb_front.h
index d8cd739..196af75 100644 (file)
--- a/drivers/amlogic/media/dtv_demod/include/addr_dtmb_front.h
+++ b/drivers/amlogic/media/dtv_demod/include/addr_dtmb_front.h
@@ -22,47 +22,48 @@
 
 #define  DTMB_FRONT_ADDR(x) (DTMB_DEMOD_BASE + (x << 2))
 
-#define  DTMB_FRONT_AFIFO_ADC                 DTMB_FRONT_ADDR(0x20)
-#define  DTMB_FRONT_AGC_CONFIG1               DTMB_FRONT_ADDR(0x21)
-#define  DTMB_FRONT_AGC_CONFIG2               DTMB_FRONT_ADDR(0x22)
-#define  DTMB_FRONT_AGC_CONFIG3               DTMB_FRONT_ADDR(0x23)
-#define  DTMB_FRONT_AGC_CONFIG4               DTMB_FRONT_ADDR(0x24)
-#define  DTMB_FRONT_DDC_BYPASS                DTMB_FRONT_ADDR(0x25)
-#define  DTMB_FRONT_DC_HOLD                   DTMB_FRONT_ADDR(0x28)
-#define  DTMB_FRONT_DAGC_TARGET_POWER         DTMB_FRONT_ADDR(0x29)
-#define  DTMB_FRONT_ACF_BYPASS                DTMB_FRONT_ADDR(0x2a)
-#define  DTMB_FRONT_COEF_SET1                 DTMB_FRONT_ADDR(0x2b)
-#define  DTMB_FRONT_COEF_SET2                 DTMB_FRONT_ADDR(0x2c)
-#define  DTMB_FRONT_COEF_SET3                 DTMB_FRONT_ADDR(0x2d)
-#define  DTMB_FRONT_COEF_SET4                 DTMB_FRONT_ADDR(0x2e)
-#define  DTMB_FRONT_COEF_SET5                 DTMB_FRONT_ADDR(0x2f)
-#define  DTMB_FRONT_COEF_SET6                 DTMB_FRONT_ADDR(0x30)
-#define  DTMB_FRONT_COEF_SET7                 DTMB_FRONT_ADDR(0x31)
-#define  DTMB_FRONT_COEF_SET8                 DTMB_FRONT_ADDR(0x32)
-#define  DTMB_FRONT_COEF_SET9                 DTMB_FRONT_ADDR(0x33)
-#define  DTMB_FRONT_COEF_SET10                DTMB_FRONT_ADDR(0x34)
-#define  DTMB_FRONT_COEF_SET11                DTMB_FRONT_ADDR(0x35)
-#define  DTMB_FRONT_COEF_SET12                DTMB_FRONT_ADDR(0x36)
-#define  DTMB_FRONT_COEF_SET13                DTMB_FRONT_ADDR(0x37)
-#define  DTMB_FRONT_COEF_SET14                DTMB_FRONT_ADDR(0x38)
-#define  DTMB_FRONT_COEF_SET15                DTMB_FRONT_ADDR(0x39)
-#define  DTMB_FRONT_COEF_SET16                DTMB_FRONT_ADDR(0x3a)
-#define  DTMB_FRONT_COEF_SET17                DTMB_FRONT_ADDR(0x3b)
-#define  DTMB_FRONT_COEF_SET18                DTMB_FRONT_ADDR(0x3c)
-#define  DTMB_FRONT_COEF_SET19                DTMB_FRONT_ADDR(0x3d)
-#define  DTMB_FRONT_SRC_CONFIG1               DTMB_FRONT_ADDR(0x3e)
-#define  DTMB_FRONT_SRC_CONFIG2               DTMB_FRONT_ADDR(0x3f)
-#define  DTMB_FRONT_SFIFO_OUT_LEN             DTMB_FRONT_ADDR(0x40)
-#define  DTMB_FRONT_DAGC_GAIN                 DTMB_FRONT_ADDR(0x41)
-#define  DTMB_FRONT_IQIB_STEP                 DTMB_FRONT_ADDR(0x42)
-#define  DTMB_FRONT_IQIB_CONFIG               DTMB_FRONT_ADDR(0x43)
-#define  DTMB_FRONT_ST_CONFIG                 DTMB_FRONT_ADDR(0x44)
-#define  DTMB_FRONT_ST_FREQ                   DTMB_FRONT_ADDR(0x45)
-#define  DTMB_FRONT_46_CONFIG                   DTMB_FRONT_ADDR(0x46)
-#define  DTMB_FRONT_47_CONFIG                   DTMB_FRONT_ADDR(0x47)
-#define  DTMB_FRONT_DEBUG_CFG                  DTMB_FRONT_ADDR(0x48)
-#define  DTMB_FRONT_MEM_ADDR                  DTMB_FRONT_ADDR(0x49)
-#define  DTMB_FRONT_19_CONFIG                   DTMB_FRONT_ADDR(0x19)
-#define  DTMB_FRONT_4d_CONFIG                   DTMB_FRONT_ADDR(0x4d)
+#define  DTMB_FRONT_19_CONFIG          DTMB_FRONT_ADDR(0x19)
+#define  DTMB_FRONT_AFIFO_ADC          DTMB_FRONT_ADDR(0x20)
+#define  DTMB_FRONT_AGC_CONFIG1                DTMB_FRONT_ADDR(0x21)
+#define  DTMB_FRONT_AGC_CONFIG2                DTMB_FRONT_ADDR(0x22)
+#define  DTMB_FRONT_AGC_CONFIG3                DTMB_FRONT_ADDR(0x23)
+#define  DTMB_FRONT_AGC_CONFIG4                DTMB_FRONT_ADDR(0x24)
+#define  DTMB_FRONT_DDC_BYPASS         DTMB_FRONT_ADDR(0x25)
+#define  DTMB_FRONT_DC_HOLD            DTMB_FRONT_ADDR(0x28)
+#define  DTMB_FRONT_DAGC_TARGET_POWER  DTMB_FRONT_ADDR(0x29)
+#define  DTMB_FRONT_ACF_BYPASS         DTMB_FRONT_ADDR(0x2a)
+#define  DTMB_FRONT_COEF_SET1          DTMB_FRONT_ADDR(0x2b)
+#define  DTMB_FRONT_COEF_SET2          DTMB_FRONT_ADDR(0x2c)
+#define  DTMB_FRONT_COEF_SET3          DTMB_FRONT_ADDR(0x2d)
+#define  DTMB_FRONT_COEF_SET4          DTMB_FRONT_ADDR(0x2e)
+#define  DTMB_FRONT_COEF_SET5          DTMB_FRONT_ADDR(0x2f)
+#define  DTMB_FRONT_COEF_SET6          DTMB_FRONT_ADDR(0x30)
+#define  DTMB_FRONT_COEF_SET7          DTMB_FRONT_ADDR(0x31)
+#define  DTMB_FRONT_COEF_SET8          DTMB_FRONT_ADDR(0x32)
+#define  DTMB_FRONT_COEF_SET9          DTMB_FRONT_ADDR(0x33)
+#define  DTMB_FRONT_COEF_SET10         DTMB_FRONT_ADDR(0x34)
+#define  DTMB_FRONT_COEF_SET11         DTMB_FRONT_ADDR(0x35)
+#define  DTMB_FRONT_COEF_SET12         DTMB_FRONT_ADDR(0x36)
+#define  DTMB_FRONT_COEF_SET13         DTMB_FRONT_ADDR(0x37)
+#define  DTMB_FRONT_COEF_SET14         DTMB_FRONT_ADDR(0x38)
+#define  DTMB_FRONT_COEF_SET15         DTMB_FRONT_ADDR(0x39)
+#define  DTMB_FRONT_COEF_SET16         DTMB_FRONT_ADDR(0x3a)
+#define  DTMB_FRONT_COEF_SET17         DTMB_FRONT_ADDR(0x3b)
+#define  DTMB_FRONT_COEF_SET18         DTMB_FRONT_ADDR(0x3c)
+#define  DTMB_FRONT_COEF_SET19         DTMB_FRONT_ADDR(0x3d)
+#define  DTMB_FRONT_SRC_CONFIG1                DTMB_FRONT_ADDR(0x3e)
+#define  DTMB_FRONT_SRC_CONFIG2                DTMB_FRONT_ADDR(0x3f)
+#define  DTMB_FRONT_SFIFO_OUT_LEN      DTMB_FRONT_ADDR(0x40)
+#define  DTMB_FRONT_DAGC_GAIN          DTMB_FRONT_ADDR(0x41)
+#define  DTMB_FRONT_IQIB_STEP          DTMB_FRONT_ADDR(0x42)
+#define  DTMB_FRONT_IQIB_CONFIG                DTMB_FRONT_ADDR(0x43)
+#define  DTMB_FRONT_ST_CONFIG          DTMB_FRONT_ADDR(0x44)
+#define  DTMB_FRONT_ST_FREQ            DTMB_FRONT_ADDR(0x45)
+#define  DTMB_FRONT_46_CONFIG          DTMB_FRONT_ADDR(0x46)
+#define  DTMB_FRONT_47_CONFIG          DTMB_FRONT_ADDR(0x47)
+#define  DTMB_FRONT_DEBUG_CFG          DTMB_FRONT_ADDR(0x48)
+#define  DTMB_FRONT_MEM_ADDR           DTMB_FRONT_ADDR(0x49)
+#define  DTMB_FRONT_4d_CONFIG          DTMB_FRONT_ADDR(0x4d)
+#define  DTMB_FRONT_4e_CONFIG          DTMB_FRONT_ADDR(0x4e)
 
 #endif