Rockchip: video: edp: Change interrupt polarity configuration

The linux code is setting polarity configuration to 3 but
uboot code is setting it to 1. Change the configuration to match the
linux configuration

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>

diff --git a/arch/arm/include/asm/arch-rockchip/edp_rk3288.h b/arch/arm/include/asm/arch-rockchip/edp_rk3288.h
index 26ab9b7..9559813 100644 (file)
--- a/arch/arm/include/asm/arch-rockchip/edp_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/edp_rk3288.h
@@ -297,7 +297,9 @@ check_member(rk3288_edp, pll_reg_5, 0xa00);
 
 /* int_ctl */
 #define SOFT_INT_CTRL                          (0x1 << 2)
-#define INT_POL                                        (0x1 << 0)
+#define INT_POL1                               (0x1 << 1)
+#define INT_POL0                               (0x1 << 0)
+#define INT_POL                                        (INT_POL0 | INT_POL1)
 
 /* sys_ctl_1 */
 #define DET_STA                                        (0x1 << 2)