#define GAUDI_ARB_WDT_TIMEOUT 0xEE6b27FF /* 8 seconds */
-#define GAUDI_CLK_GATE_DEBUGFS_MASK (\
- BIT(GAUDI_ENGINE_ID_MME_0) |\
- BIT(GAUDI_ENGINE_ID_MME_2) |\
- GENMASK_ULL(GAUDI_ENGINE_ID_TPC_7, GAUDI_ENGINE_ID_TPC_0))
-
#define HBM_SCRUBBING_TIMEOUT_US 1000000 /* 1s */
-#define GAUDI_PLL_MAX 10
-
#define BIN_REG_STRING_SIZE sizeof("0b10101010101010101010101010101010")
#define MONITOR_SOB_STRING_SIZE 256
#define GAUDI2_NUM_OF_HIF_FATAL_ERR_CAUSE 2
#define GAUDI2_NUM_OF_AXI_DRAIN_ERR_CAUSE 2
#define GAUDI2_NUM_OF_HBM_MC_SPI_CAUSE 5
-#define GAUDI2_NUM_OF_NIC_RXB_CORE_SEI_CAUSE 2
-#define GAUDI2_NUM_OF_NIC_RXB_CORE_SPI_CAUSE 6
-#define GAUDI2_NUM_OF_NIC_RXE_SEI_CAUSE 4
-#define GAUDI2_NUM_OF_NIC_RXE_SPI_CAUSE 24
#define GAUDI2_MMU_CACHE_INV_TIMEOUT_USEC (MMU_CONFIG_TIMEOUT_USEC * 10)
#define GAUDI2_PLDM_MMU_TIMEOUT_USEC (MMU_CONFIG_TIMEOUT_USEC * 200)
#define GAUDI2_PLDM_CORESIGHT_TIMEOUT_USEC (CORESIGHT_TIMEOUT_USEC * 2000)
#define SPMU_MAX_COUNTERS 6
-/* SPMU should also include overflow_idx and cycle_cnt_idx */
-#define SPMU_DATA_LEN (SPMU_MAX_COUNTERS + 2)
#define COMPONENT_ID_INVALID ((u32)(-1))
#define MAX_BMONS_PER_UNIT 8