ARM: dts: am43xx clock data
authorGeorge Cherian <george.cherian@ti.com>
Wed, 19 Mar 2014 10:10:00 +0000 (15:40 +0530)
committerTony Lindgren <tony@atomide.com>
Tue, 6 May 2014 17:19:49 +0000 (10:19 -0700)
Add USB and USB PHY reference clock data

Signed-off-by: George Cherian <george.cherian@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Acked-by: Felipe Balbi <balbi@ti.com>
[tony@atomide.com: tabified]
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/am43xx-clocks.dtsi

index 142009c..775d5b1 100644 (file)
                clocks = <&clk_32768_ck>, <&clk_32k_tpm_ck>;
                reg = <0x4260>;
        };
+
+       usb_phy0_always_on_clk32k: usb_phy0_always_on_clk32k {
+               #clock-cells = <0>;
+               compatible = "ti,gate-clock";
+               clocks = <&usbphy_32khz_clkmux>;
+               ti,bit-shift = <8>;
+               reg = <0x2a40>;
+       };
+
+       usb_phy1_always_on_clk32k: usb_phy1_always_on_clk32k {
+               #clock-cells = <0>;
+               compatible = "ti,gate-clock";
+               clocks = <&usbphy_32khz_clkmux>;
+               ti,bit-shift = <8>;
+               reg = <0x2a48>;
+       };
+
+       usb_otg_ss0_refclk960m: usb_otg_ss0_refclk960m {
+               #clock-cells = <0>;
+               compatible = "ti,gate-clock";
+               clocks = <&dpll_per_clkdcoldo>;
+               ti,bit-shift = <8>;
+               reg = <0x8a60>;
+       };
+
+       usb_otg_ss1_refclk960m: usb_otg_ss1_refclk960m {
+               #clock-cells = <0>;
+               compatible = "ti,gate-clock";
+               clocks = <&dpll_per_clkdcoldo>;
+               ti,bit-shift = <8>;
+               reg = <0x8a68>;
+       };
 };