I/OAT: do not set DCACTRL_CMPL_WRITE_ENABLE for I/OAT ver.3

Flag DCACTRL_CMPL_WRITE_ENABLE is valid only for I/OAT ver.2
so it should not be set for I/OAT ver.3.

Signed-off-by: Maciej Sosnowski <maciej.sosnowski@intel.com>
Signed-off-by: Shannon Nelson <shannon.nelson@intel.com>
Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>

diff --git a/drivers/dma/ioat_dma.c b/drivers/dma/ioat_dma.c
index b3759c4..879f4a0 100644 (file)
--- a/drivers/dma/ioat_dma.c
+++ b/drivers/dma/ioat_dma.c
@@ -189,11 +189,13 @@ static int ioat_dma_enumerate_channels(struct ioatdma_device *device)
                ioat_chan->xfercap = xfercap;
                ioat_chan->desccount = 0;
                INIT_DELAYED_WORK(&ioat_chan->work, ioat_dma_chan_reset_part2);
-               if (ioat_chan->device->version != IOAT_VER_1_2) {
-                       writel(IOAT_DCACTRL_CMPL_WRITE_ENABLE
-                                       | IOAT_DMA_DCA_ANY_CPU,
-                               ioat_chan->reg_base + IOAT_DCACTRL_OFFSET);
-               }
+               if (ioat_chan->device->version == IOAT_VER_2_0)
+                       writel(IOAT_DCACTRL_CMPL_WRITE_ENABLE |
+                              IOAT_DMA_DCA_ANY_CPU,
+                              ioat_chan->reg_base + IOAT_DCACTRL_OFFSET);
+               else if (ioat_chan->device->version == IOAT_VER_3_0)
+                       writel(IOAT_DMA_DCA_ANY_CPU,
+                              ioat_chan->reg_base + IOAT_DCACTRL_OFFSET);
                spin_lock_init(&ioat_chan->cleanup_lock);
                spin_lock_init(&ioat_chan->desc_lock);
                INIT_LIST_HEAD(&ioat_chan->free_desc);