ARM: dts: stm32: Create separate pinmux for qspi cs pin in stm32mp15-pinctrl.dtsi

Create a separate pinmux for qspi chip select in stm32mp15-pinctrl.dtsi.
In the case we want to use transfer_one() API to communicate with a SPI
device, chip select signal must be driven individually.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
index 2cc9341..a9d2bec 100644 (file)
--- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
@@ -1261,7 +1261,7 @@
        };
 
        qspi_bk1_pins_a: qspi-bk1-0 {
-               pins1 {
+               pins {
                        pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
                                 <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
                                 <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
@@ -1270,12 +1270,6 @@
                        drive-push-pull;
                        slew-rate = <1>;
                };
-               pins2 {
-                       pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
-                       bias-pull-up;
-                       drive-push-pull;
-                       slew-rate = <1>;
-               };
        };
 
        qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
@@ -1283,13 +1277,12 @@
                        pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */
                                 <STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */
                                 <STM32_PINMUX('F', 7, ANALOG)>, /* QSPI_BK1_IO2 */
-                                <STM32_PINMUX('F', 6, ANALOG)>, /* QSPI_BK1_IO3 */
-                                <STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */
+                                <STM32_PINMUX('F', 6, ANALOG)>; /* QSPI_BK1_IO3 */
                };
        };
 
        qspi_bk2_pins_a: qspi-bk2-0 {
-               pins1 {
+               pins {
                        pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
                                 <STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */
                                 <STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */
@@ -1298,7 +1291,34 @@
                        drive-push-pull;
                        slew-rate = <1>;
                };
-               pins2 {
+       };
+
+       qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 {
+               pins {
+                       pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* QSPI_BK2_IO0 */
+                                <STM32_PINMUX('H', 3, ANALOG)>, /* QSPI_BK2_IO1 */
+                                <STM32_PINMUX('G', 10, ANALOG)>, /* QSPI_BK2_IO2 */
+                                <STM32_PINMUX('G', 7, ANALOG)>; /* QSPI_BK2_IO3 */
+               };
+       };
+
+       qspi_cs1_pins_a: qspi-cs1-0 {
+               pins {
+                       pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
+                       bias-pull-up;
+                       drive-push-pull;
+                       slew-rate = <1>;
+               };
+       };
+
+       qspi_cs1_sleep_pins_a: qspi-cs1-sleep-0 {
+               pins {
+                       pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */
+               };
+       };
+
+       qspi_cs2_pins_a: qspi-cs2-0 {
+               pins {
                        pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
                        bias-pull-up;
                        drive-push-pull;
@@ -1306,13 +1326,9 @@
                };
        };
 
-       qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 {
+       qspi_cs2_sleep_pins_a: qspi-cs2-sleep-0 {
                pins {
-                       pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* QSPI_BK2_IO0 */
-                                <STM32_PINMUX('H', 3, ANALOG)>, /* QSPI_BK2_IO1 */
-                                <STM32_PINMUX('G', 10, ANALOG)>, /* QSPI_BK2_IO2 */
-                                <STM32_PINMUX('G', 7, ANALOG)>, /* QSPI_BK2_IO3 */
-                                <STM32_PINMUX('C', 0, ANALOG)>; /* QSPI_BK2_NCS */
+                       pinmux = <STM32_PINMUX('C', 0, ANALOG)>; /* QSPI_BK2_NCS */
                };
        };
 

diff --git a/arch/arm/boot/dts/stm32mp157c-ev1.dts b/arch/arm/boot/dts/stm32mp157c-ev1.dts
index d142dd3..050c3c2 100644 (file)
--- a/arch/arm/boot/dts/stm32mp157c-ev1.dts
+++ b/arch/arm/boot/dts/stm32mp157c-ev1.dts
@@ -255,8 +255,16 @@
 
 &qspi {
        pinctrl-names = "default", "sleep";
-       pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a &qspi_bk2_pins_a>;
-       pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a &qspi_bk2_sleep_pins_a>;
+       pinctrl-0 = <&qspi_clk_pins_a
+                    &qspi_bk1_pins_a
+                    &qspi_cs1_pins_a
+                    &qspi_bk2_pins_a
+                    &qspi_cs2_pins_a>;
+       pinctrl-1 = <&qspi_clk_sleep_pins_a
+                    &qspi_bk1_sleep_pins_a
+                    &qspi_cs1_sleep_pins_a
+                    &qspi_bk2_sleep_pins_a
+                    &qspi_cs2_sleep_pins_a>;
        reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
        #address-cells = <1>;
        #size-cells = <0>;