configs: Move CONFIG_SPI_FLASH into defconfigs
authorVignesh R <vigneshr@ti.com>
Tue, 5 Feb 2019 05:59:10 +0000 (11:29 +0530)
committerJagan Teki <jagan@amarulasolutions.com>
Thu, 7 Feb 2019 10:03:21 +0000 (15:33 +0530)
Completely move CONFIG_SPI_FLASH from remaining board header files to
defconfigs

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
32 files changed:
configs/cgtqmx6eval_defconfig
configs/chromebit_mickey_defconfig
configs/chromebook_jerry_defconfig
configs/chromebook_minnie_defconfig
configs/evb-rk3036_defconfig
configs/evb-rk3128_defconfig
configs/evb-rk3288_defconfig
configs/evb-rk3328_defconfig
configs/fennec-rk3288_defconfig
configs/firefly-rk3288_defconfig
configs/kylin-rk3036_defconfig
configs/ls2080aqds_SECURE_BOOT_defconfig
configs/ls2080aqds_defconfig
configs/ls2080aqds_nand_defconfig
configs/ls2080aqds_qspi_defconfig
configs/ls2080aqds_sdcard_defconfig
configs/miqi-rk3288_defconfig
configs/phycore-rk3288_defconfig
configs/popmetal-rk3288_defconfig
configs/rock2_defconfig
configs/rock_defconfig
configs/tinker-rk3288_defconfig
configs/turris_omnia_defconfig
configs/vyasa-rk3288_defconfig
include/configs/cgtqmx6eval.h
include/configs/ls2080aqds.h
include/configs/rk3036_common.h
include/configs/rk3128_common.h
include/configs/rk3188_common.h
include/configs/rk3288_common.h
include/configs/rk3328_common.h
include/configs/turris_omnia.h

index 80bff7d..99c581b 100644 (file)
@@ -55,6 +55,7 @@ CONFIG_DFU_SF=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x12000000
 CONFIG_FSL_ESDHC=y
+CONFIG_SPI_FLASH=y
 CONFIG_PHYLIB=y
 CONFIG_MII=y
 CONFIG_SPI=y
index fd4cd80..3ad4d7d 100644 (file)
@@ -59,6 +59,7 @@ CONFIG_CROS_EC_SPI=y
 CONFIG_PWRSEQ=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y
index 88a37c5..0ce5ac5 100644 (file)
@@ -64,6 +64,7 @@ CONFIG_CROS_EC_SPI=y
 CONFIG_PWRSEQ=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y
index 2e17e73..4e7feff 100644 (file)
@@ -60,6 +60,7 @@ CONFIG_CROS_EC_SPI=y
 CONFIG_PWRSEQ=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y
index 439e691..33eaa06 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_LED=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3036=y
 # CONFIG_SPL_DM_SERIAL is not set
index 78c5ac6..d2c0fb0 100644 (file)
@@ -29,6 +29,7 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_PHY=y
 CONFIG_PINCTRL=y
 CONFIG_REGULATOR_PWM=y
index 671bb8c..d0eba8a 100644 (file)
@@ -52,6 +52,7 @@ CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
index 10a5f09..ad67517 100644 (file)
@@ -32,6 +32,7 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
index 25baf4c..4e0898d 100644 (file)
@@ -51,6 +51,7 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
index 8c1f763..b8eae0f 100644 (file)
@@ -54,6 +54,7 @@ CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
index 57558c6..d6d5abb 100644 (file)
@@ -40,6 +40,7 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_LED=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_PINCTRL=y
 CONFIG_DM_REGULATOR_FIXED=y
 # CONFIG_SPL_DM_SERIAL is not set
index d7c0db6..446c2e7 100644 (file)
@@ -38,6 +38,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
index 51cf327..9e0e66c 100644 (file)
@@ -41,6 +41,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
index 30b506f..9ab3805 100644 (file)
@@ -45,6 +45,7 @@ CONFIG_FSL_CAAM=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
index 44a718e..edbf2e9 100644 (file)
@@ -36,6 +36,7 @@ CONFIG_FSL_CAAM=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
index d6ca289..fff54b1 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_DM=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
index 0d9f6c3..b26bd1e 100644 (file)
@@ -51,6 +51,7 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
index 92aa802..1e54035 100644 (file)
@@ -55,6 +55,7 @@ CONFIG_MISC=y
 CONFIG_I2C_EEPROM=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
index 5cbcb89..ca194fd 100644 (file)
@@ -51,6 +51,7 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
index a5faa8f..746c0bf 100644 (file)
@@ -51,6 +51,7 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
index 36e35eb..2de51e8 100644 (file)
@@ -40,6 +40,7 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_LED=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
index 24222e5..68adf76 100644 (file)
@@ -54,6 +54,7 @@ CONFIG_MISC=y
 CONFIG_I2C_EEPROM=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
index 4a1e23c..8de522e 100644 (file)
@@ -41,6 +41,7 @@ CONFIG_MISC=y
 CONFIG_ATSHA204A=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_MV=y
+CONFIG_SPI_FLASH=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
 CONFIG_MVNETA=y
index 03c8a76..c4779c0 100644 (file)
@@ -49,6 +49,7 @@ CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
index 5d24788..e01bf5b 100644 (file)
@@ -31,7 +31,6 @@
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 
 /* SPI NOR */
-#define CONFIG_SPI_FLASH
 #define CONFIG_SPI_FLASH_STMICRO
 #define CONFIG_SPI_FLASH_SST
 #define CONFIG_SF_DEFAULT_BUS          0
index 2822811..a23a4ed 100644 (file)
@@ -294,8 +294,6 @@ unsigned long get_board_ddr_clk(void);
 
 /* SPI */
 #if defined(CONFIG_FSL_QSPI) || defined(CONFIG_FSL_DSPI)
-#define CONFIG_SPI_FLASH
-
 #ifdef CONFIG_FSL_DSPI
 #define CONFIG_SPI_FLASH_STMICRO
 #define CONFIG_SPI_FLASH_SST
index e307855..4fc9226 100644 (file)
@@ -28,7 +28,6 @@
 #define SDRAM_BANK_SIZE                        (512UL << 20UL)
 #define SDRAM_MAX_SIZE                  (CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE)
 
-#define CONFIG_SPI_FLASH
 #define CONFIG_SPI_FLASH_GIGADEVICE
 #define CONFIG_SF_DEFAULT_SPEED 20000000
 
index f4f64ed..9451715 100644 (file)
@@ -30,7 +30,6 @@
 #define CONFIG_SYS_SDRAM_BASE          0x60000000
 #define SDRAM_MAX_SIZE                 0x80000000
 
-#define CONFIG_SPI_FLASH
 #define CONFIG_SF_DEFAULT_SPEED 20000000
 #define CONFIG_USB_OHCI_NEW
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS     1
index 612d643..36e494e 100644 (file)
@@ -37,7 +37,6 @@
 #define SDRAM_BANK_SIZE                        (2UL << 30)
 #define SDRAM_MAX_SIZE                 0x80000000
 
-#define CONFIG_SPI_FLASH
 #define CONFIG_SF_DEFAULT_SPEED 20000000
 
 #ifndef CONFIG_SPL_BUILD
index 01f297b..c59f5ef 100644 (file)
@@ -40,7 +40,6 @@
 #define SDRAM_BANK_SIZE                        (2UL << 30)
 #define SDRAM_MAX_SIZE                 0xfe000000
 
-#define CONFIG_SPI_FLASH
 #define CONFIG_SF_DEFAULT_SPEED 20000000
 
 #ifndef CONFIG_SPL_BUILD
index 7913ef7..02233d6 100644 (file)
@@ -26,7 +26,6 @@
 #define CONFIG_SYS_SDRAM_BASE          0
 #define SDRAM_MAX_SIZE                 0xff000000
 
-#define CONFIG_SPI_FLASH
 #define CONFIG_SF_DEFAULT_SPEED 20000000
 
 #ifndef CONFIG_SPL_BUILD
index 598674c..7d2d7a8 100644 (file)
@@ -37,7 +37,6 @@
 /* SPI NOR flash default params, used by sf commands */
 #define CONFIG_SF_DEFAULT_SPEED                1000000
 #define CONFIG_SF_DEFAULT_MODE         SPI_MODE_3
-#define CONFIG_SPI_FLASH
 #define CONFIG_SPI_FLASH_SPANSION
 
 /*