drm/i915: Use compressed bpp when calculating m/n value for DP MST DSC
authorStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Mon, 27 Mar 2023 06:42:17 +0000 (09:42 +0300)
committerStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Wed, 29 Mar 2023 08:06:55 +0000 (11:06 +0300)
For obvious reasons, we use compressed bpp instead of pipe bpp for
DSC DP SST case. Lets be consistent and use compressed bpp instead of
pipe bpp, also in DP MST DSC case.

Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Fixes: d51f25eb479a ("drm/i915: Add DSC support to MST path")
Link: https://patchwork.freedesktop.org/patch/msgid/20230327064217.24033-1-stanislav.lisovskiy@intel.com
drivers/gpu/drm/i915/display/intel_dp_mst.c

index a860cbc..c3e8db9 100644 (file)
@@ -232,7 +232,7 @@ static int intel_dp_dsc_mst_compute_link_config(struct intel_encoder *encoder,
                        return slots;
        }
 
-       intel_link_compute_m_n(crtc_state->pipe_bpp,
+       intel_link_compute_m_n(crtc_state->dsc.compressed_bpp,
                               crtc_state->lane_count,
                               adjusted_mode->crtc_clock,
                               crtc_state->port_clock,