[mips] Fix predicate for the MipsTruncIntFP pattern

This is a follow-up to the rL337171. This patch fixes regression
introduced by the r337171 and enables MipsTruncIntFP pattern.

Differential revision: https://reviews.llvm.org/D49469

llvm-svn: 337392

diff --git a/llvm/lib/Target/Mips/MipsInstrFPU.td b/llvm/lib/Target/Mips/MipsInstrFPU.td
index b17a340..dd30e20 100644 (file)
--- a/llvm/lib/Target/Mips/MipsInstrFPU.td
+++ b/llvm/lib/Target/Mips/MipsInstrFPU.td
@@ -894,7 +894,7 @@ def : MipsPat<(f64 (sint_to_fp GPR64Opnd:$src)),
               (PseudoCVT_D64_L GPR64Opnd:$src)>, FGR_64;
 
 def : MipsPat<(MipsTruncIntFP FGR64Opnd:$src),
-              (TRUNC_W_D64 FGR64Opnd:$src)>, ISA_MIPS3, FGR_64;
+              (TRUNC_W_D64 FGR64Opnd:$src)>, ISA_MIPS2, FGR_64;
 def : MipsPat<(MipsTruncIntFP FGR32Opnd:$src),
               (TRUNC_L_S FGR32Opnd:$src)>, ISA_MIPS2, FGR_64;
 def : MipsPat<(MipsTruncIntFP FGR64Opnd:$src),

diff --git a/llvm/test/CodeGen/Mips/double2int.ll b/llvm/test/CodeGen/Mips/double2int.ll
index 445ccb3..f0d8ad2 100644 (file)
--- a/llvm/test/CodeGen/Mips/double2int.ll
+++ b/llvm/test/CodeGen/Mips/double2int.ll
@@ -1,4 +1,5 @@
-; RUN: llc -march=mips < %s | FileCheck %s
+; RUN: llc -march=mips -mcpu=mips32 < %s | FileCheck %s
+; RUN: llc -march=mips -mcpu=mips32r6 < %s | FileCheck %s
 
 define i32 @f1(double %d) nounwind readnone {
 entry: