arm64: dts: imx8mp: Add Hantro G1, G2 DT nodes

Add DT nodes for the Hantro VPU found in i.MX8MP SoC.

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Tested-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index a2daf4e..adddbe3 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -1276,6 +1276,28 @@
                        power-domains = <&pgc_gpu2d>;
                };
 
+               vpu_g1: video-codec@38300000 {
+                       compatible = "nxp,imx8mm-vpu-g1";
+                       reg = <0x38300000 0x10000>;
+                       interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>;
+                       assigned-clocks = <&clk IMX8MP_CLK_VPU_G1>;
+                       assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
+                       assigned-clock-rates = <600000000>;
+                       power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G1>;
+               };
+
+               vpu_g2: video-codec@38310000 {
+                       compatible = "nxp,imx8mq-vpu-g2";
+                       reg = <0x38310000 0x10000>;
+                       interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>;
+                       assigned-clocks = <&clk IMX8MP_CLK_VPU_G2>;
+                       assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>;
+                       assigned-clock-rates = <500000000>;
+                       power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G2>;
+               };
+
                vpumix_blk_ctrl: blk-ctrl@38330000 {
                        compatible = "fsl,imx8mp-vpu-blk-ctrl", "syscon";
                        reg = <0x38330000 0x100>;
@@ -1287,6 +1309,9 @@
                                 <&clk IMX8MP_CLK_VPU_G2_ROOT>,
                                 <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
                        clock-names = "g1", "g2", "vc8000e";
+                       assigned-clocks = <&clk IMX8MP_CLK_VPU_BUS>, <&clk IMX8MP_VPU_PLL>;
+                       assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
+                       assigned-clock-rates = <600000000>, <600000000>;
                        interconnects = <&noc IMX8MP_ICM_VPU_G1 &noc IMX8MP_ICN_VIDEO>,
                                        <&noc IMX8MP_ICM_VPU_G2 &noc IMX8MP_ICN_VIDEO>,
                                        <&noc IMX8MP_ICM_VPU_H1 &noc IMX8MP_ICN_VIDEO>;