sh.md (umulhisi3_i, mulhisi3_i): Fix mnemonics.

* config/sh/sh.md (umulhisi3_i, mulhisi3_i): Fix mnemonics.
* config/sh/lib1funcs.asm (mulsi3): Convert mulu to mulu.w.

From-SVN: r40381

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7fd1e0f..767be09 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2001-03-10  Toshiyasu Morita  <toshiyasu.morita@hsa.hitachi.com>
+
+       * config/sh/sh.md (umulhisi3_i, mulhisi3_i): Fix mnemonics. 
+       * config/sh/lib1funcs.asm (mulsi3): Convert mulu to mulu.w.
+
 Sat Mar 10 22:42:05 2001  Alexandre Oliva  <aoliva@redhat.com>
 
        * tree.c (build_common_tree_nodes_2): Don't copy va_list_type_node

diff --git a/gcc/config/sh/lib1funcs.asm b/gcc/config/sh/lib1funcs.asm
index 5ebea99..192e3ad 100644 (file)
--- a/gcc/config/sh/lib1funcs.asm
+++ b/gcc/config/sh/lib1funcs.asm
@@ -845,7 +845,7 @@ GLOBAL(movstrSI12_i4):
 !
 
 GLOBAL(mulsi3):
-       mulu    r4,r5           ! multiply the lsws  macl=bb*dd
+       mulu.w  r4,r5           ! multiply the lsws  macl=bb*dd
        mov     r5,r3           ! r3 = ccdd
        swap.w  r4,r2           ! r2 = bbaa
        xtrct   r2,r3           ! r3 = aacc
@@ -855,9 +855,9 @@ GLOBAL(mulsi3):
        sts     macl,r0
 
 hiset: sts     macl,r0         ! r0 = bb*dd
-       mulu    r2,r5           ! brewing macl = aa*dd
+       mulu.w  r2,r5           ! brewing macl = aa*dd
        sts     macl,r1
-       mulu    r3,r4           ! brewing macl = cc*bb
+       mulu.w  r3,r4           ! brewing macl = cc*bb
        sts     macl,r2
        add     r1,r2
        shll16  r2

diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
index b471a4a..6707c59 100644 (file)
--- a/gcc/config/sh/sh.md
+++ b/gcc/config/sh/sh.md
@@ -1160,7 +1160,7 @@
                 (zero_extend:SI
                  (match_operand:HI 1 "arith_reg_operand" "r"))))]
   ""
-  "mulu        %1,%0"
+  "mulu.w      %1,%0"
   [(set_attr "type" "smpy")])
 
 (define_insn "mulhisi3_i"
@@ -1170,7 +1170,7 @@
                 (sign_extend:SI
                  (match_operand:HI 1 "arith_reg_operand" "r"))))]
   ""
-  "muls        %1,%0"
+  "muls.w      %1,%0"
   [(set_attr "type" "smpy")])
 
 (define_expand "mulhisi3"