drm/i915/gt: Rename i915_gem_restore_ggtt_mappings() for its new placement
authorChris Wilson <chris@chris-wilson.co.uk>
Thu, 30 Jan 2020 18:17:09 +0000 (18:17 +0000)
committerChris Wilson <chris@chris-wilson.co.uk>
Thu, 30 Jan 2020 21:35:37 +0000 (21:35 +0000)
The i915_ggtt now sits beneath gt/ outside of the auspices of gem/ and
should be given a fresh name to reflect that. We also want to give it a
name that reflects its role in the system suspend/resume, with the
intention of pulling together all the GGTT operations (e.g. restoring
the fence registers once they are pulled under gt/intel_ggtt_detiler.c)

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
Rreviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200130181710.2030251-2-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/gt/intel_ggtt.c
drivers/gpu/drm/i915/gt/intel_gtt.h
drivers/gpu/drm/i915/i915_drv.c
drivers/gpu/drm/i915/i915_gem.c
drivers/gpu/drm/i915/selftests/i915_gem.c

index f83070b..91ec175 100644 (file)
@@ -104,27 +104,12 @@ static bool needs_idle_maps(struct drm_i915_private *i915)
        return IS_GEN(i915, 5) && IS_MOBILE(i915) && intel_vtd_active();
 }
 
-static void ggtt_suspend_mappings(struct i915_ggtt *ggtt)
+void i915_ggtt_suspend(struct i915_ggtt *ggtt)
 {
-       struct drm_i915_private *i915 = ggtt->vm.i915;
-
-       /*
-        * Don't bother messing with faults pre GEN6 as we have little
-        * documentation supporting that it's a good idea.
-        */
-       if (INTEL_GEN(i915) < 6)
-               return;
-
-       intel_gt_check_and_clear_faults(ggtt->vm.gt);
-
        ggtt->vm.clear_range(&ggtt->vm, 0, ggtt->vm.total);
-
        ggtt->invalidate(ggtt);
-}
 
-void i915_gem_suspend_gtt_mappings(struct drm_i915_private *i915)
-{
-       ggtt_suspend_mappings(&i915->ggtt);
+       intel_gt_check_and_clear_faults(ggtt->vm.gt);
 }
 
 void gen6_ggtt_invalidate(struct i915_ggtt *ggtt)
@@ -1155,7 +1140,7 @@ void i915_ggtt_disable_guc(struct i915_ggtt *ggtt)
        ggtt->invalidate(ggtt);
 }
 
-static void ggtt_restore_mappings(struct i915_ggtt *ggtt)
+void i915_ggtt_resume(struct i915_ggtt *ggtt)
 {
        struct i915_vma *vma;
        bool flush = false;
@@ -1163,8 +1148,6 @@ static void ggtt_restore_mappings(struct i915_ggtt *ggtt)
 
        intel_gt_check_and_clear_faults(ggtt->vm.gt);
 
-       mutex_lock(&ggtt->vm.mutex);
-
        /* First fill our portion of the GTT with scratch pages */
        ggtt->vm.clear_range(&ggtt->vm, 0, ggtt->vm.total);
 
@@ -1191,19 +1174,10 @@ static void ggtt_restore_mappings(struct i915_ggtt *ggtt)
        atomic_set(&ggtt->vm.open, open);
        ggtt->invalidate(ggtt);
 
-       mutex_unlock(&ggtt->vm.mutex);
-
        if (flush)
                wbinvd_on_all_cpus();
-}
-
-void i915_gem_restore_gtt_mappings(struct drm_i915_private *i915)
-{
-       struct i915_ggtt *ggtt = &i915->ggtt;
-
-       ggtt_restore_mappings(ggtt);
 
-       if (INTEL_GEN(i915) >= 8)
+       if (INTEL_GEN(ggtt->vm.i915) >= 8)
                setup_private_pat(ggtt->vm.gt->uncore);
 }
 
index 7da7681..2300444 100644 (file)
@@ -512,8 +512,8 @@ int i915_ppgtt_init_hw(struct intel_gt *gt);
 
 struct i915_ppgtt *i915_ppgtt_create(struct intel_gt *gt);
 
-void i915_gem_suspend_gtt_mappings(struct drm_i915_private *i915);
-void i915_gem_restore_gtt_mappings(struct drm_i915_private *i915);
+void i915_ggtt_suspend(struct i915_ggtt *gtt);
+void i915_ggtt_resume(struct i915_ggtt *ggtt);
 
 u64 gen8_pte_encode(dma_addr_t addr,
                    enum i915_cache_level level,
index e9b42e9..93c4dfa 100644 (file)
@@ -1719,7 +1719,7 @@ static int i915_drm_suspend(struct drm_device *dev)
 
        intel_suspend_hw(dev_priv);
 
-       i915_gem_suspend_gtt_mappings(dev_priv);
+       i915_ggtt_suspend(&dev_priv->ggtt);
 
        i915_save_state(dev_priv);
 
@@ -1832,7 +1832,7 @@ static int i915_drm_resume(struct drm_device *dev)
        if (ret)
                DRM_ERROR("failed to re-enable GGTT\n");
 
-       i915_gem_restore_gtt_mappings(dev_priv);
+       i915_ggtt_resume(&dev_priv->ggtt);
        i915_gem_restore_fences(&dev_priv->ggtt);
 
        intel_csr_ucode_resume(dev_priv);
index ff79da5..25fce35 100644 (file)
@@ -1153,7 +1153,7 @@ err_unlock:
 
                /* Minimal basic recovery for KMS */
                ret = i915_ggtt_enable_hw(dev_priv);
-               i915_gem_restore_gtt_mappings(dev_priv);
+               i915_ggtt_resume(&dev_priv->ggtt);
                i915_gem_restore_fences(&dev_priv->ggtt);
                intel_init_clock_gating(dev_priv);
        }
index 78f36fa..623759b 100644 (file)
@@ -98,7 +98,7 @@ static void pm_suspend(struct drm_i915_private *i915)
        intel_wakeref_t wakeref;
 
        with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
-               i915_gem_suspend_gtt_mappings(i915);
+               i915_ggtt_suspend(&i915->ggtt);
                i915_gem_suspend_late(i915);
        }
 }
@@ -108,7 +108,7 @@ static void pm_hibernate(struct drm_i915_private *i915)
        intel_wakeref_t wakeref;
 
        with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
-               i915_gem_suspend_gtt_mappings(i915);
+               i915_ggtt_suspend(&i915->ggtt);
 
                i915_gem_freeze(i915);
                i915_gem_freeze_late(i915);
@@ -124,7 +124,7 @@ static void pm_resume(struct drm_i915_private *i915)
         * that runtime-pm just works.
         */
        with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
-               i915_gem_restore_gtt_mappings(i915);
+               i915_ggtt_resume(&i915->ggtt);
                i915_gem_restore_fences(&i915->ggtt);
 
                i915_gem_resume(i915);