testsuite/arm: Add arm_cmse_hw effective target

Some of the CMSE tests have 'dg-do run', but qemu-arm does not support
the privileged instructions involved; one has to use qemu-system-arm
for this, which in turn requires modifications to the default
newlib/libgloss startup code to enable the FPU as the FP status
registers need to be saved when using CMSE code.

This patch introduces arm_cmse_hw, similar to arm_neon_hw, to detect
whether the execution engine supports the CMSE instructions. If not,
we set dg-do-what-default to assemble instead of run. We thus remove
all the 'dg-do run' directives from CMSE tests, to rely on
dg-do-what-default instead.

Note that cmse-16.c used to pass with dg-do run under qemu-arm,
because the property being tested is not available (qemu-arm does not
model secure vs non-secure memory). The patch removes dg-do from it
too, since it is relevant only with an adequate simulator.

Before the patch, bitfield-[123].c and struct-1.c fail at execution
under qemu-arm. With the patch, execution is skipped.

The same tests pass under qemu-system-arm both with and without the
patch.

This avoids failures when testing with
-mthumb/-mfloat-abi=hard/-march=armv8-m.main+fp+dsp under qemu-arm for
cortex-m33.

I'm also running tests with qemu-system-arm for cortex-m33, but I run
only cmse.exp with a patched newlib in this case: I use qemu-arm for
all combinations except that one because it's faster and supports
semihosting.

I do not have a setup to check this with actual hardware or another
simulator.

2021-04-26  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/
	* doc/sourcebuild.texi (arm_cmse_hw): Document.

	gcc/testsuite/
	* gcc.target/arm/cmse/bitfield-1.c: Remove dg-do.
	* gcc.target/arm/cmse/bitfield-2.c: Likewise.
	* gcc.target/arm/cmse/bitfield-3.c: Likewise.
	* gcc.target/arm/cmse/cmse-16.c: Likewise.
	* gcc.target/arm/cmse/struct-1.c: Likewise.
	* gcc.target/arm/cmse/cmse.exp: Set dg-do-what-default depending
	on arm_cmse_hw.
	* lib/target-supports.exp (check_effective_target_arm_cmse_hw):
	New.

diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index d3200a4..3a1d653 100644 (file)
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -2096,6 +2096,9 @@ div instruction.
 ARM target supports ARMv8-M Security Extensions, enabled by the @code{-mcmse}
 option.
 
+@item arm_cmse_hw
+Test system supports executing CMSE instructions.
+
 @item arm_coproc1_ok
 @anchor{arm_coproc1_ok}
 ARM target supports the following coprocessor instructions: @code{CDP},

diff --git a/gcc/testsuite/gcc.target/arm/cmse/bitfield-1.c b/gcc/testsuite/gcc.target/arm/cmse/bitfield-1.c
index cae2f06..5685f74 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/cmse/bitfield-1.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/bitfield-1.c
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* This test is executed only if the execution engine supports CMSE instructions.  */
 /* { dg-options "--save-temps -mcmse -Wl,--section-start,.gnu.sgstubs=0x00400000" } */
 
 typedef struct

diff --git a/gcc/testsuite/gcc.target/arm/cmse/bitfield-2.c b/gcc/testsuite/gcc.target/arm/cmse/bitfield-2.c
index 21a53cd..7a794d4 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/cmse/bitfield-2.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/bitfield-2.c
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* This test is executed only if the execution engine supports CMSE instructions.  */
 /* { dg-options "--save-temps -mcmse -Wl,--section-start,.gnu.sgstubs=0x00400000" } */
 
 typedef struct

diff --git a/gcc/testsuite/gcc.target/arm/cmse/bitfield-3.c b/gcc/testsuite/gcc.target/arm/cmse/bitfield-3.c
index e8f973e..5875f8d 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/cmse/bitfield-3.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/bitfield-3.c
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* This test is executed only if the execution engine supports CMSE instructions.  */
 /* { dg-options "--save-temps -mcmse -Wl,--section-start,.gnu.sgstubs=0x00400000" } */
 
 typedef struct

diff --git a/gcc/testsuite/gcc.target/arm/cmse/cmse-16.c b/gcc/testsuite/gcc.target/arm/cmse/cmse-16.c
index 3fb0380..6a243d5 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/cmse/cmse-16.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/cmse-16.c
@@ -1,4 +1,8 @@
-/* { dg-do run } */
+/* This test is executed only if the execution engine supports CMSE instructions.  */
+/* Note that it "passes" on qemu-arm while it shouldn't because that simulator
+   does not model secure memory: it's better to skip it in this case, and rely
+   on do-what-default as set in cmse.exp. (It works as expected with
+   qemu-system-mode).  */
 /* { dg-options "-Os -mcmse" }  */
 
 #include <arm_cmse.h>

diff --git a/gcc/testsuite/gcc.target/arm/cmse/cmse.exp b/gcc/testsuite/gcc.target/arm/cmse/cmse.exp
index 6ce99fe..4da1a46 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/cmse/cmse.exp
+++ b/gcc/testsuite/gcc.target/arm/cmse/cmse.exp
@@ -34,7 +34,12 @@ if ![info exists DEFAULT_CFLAGS] then {
 dg-init
 
 set saved-dg-do-what-default ${dg-do-what-default}
-set dg-do-what-default "assemble"
+
+if {[is-effective-target arm_cmse_hw]} then {
+    set dg-do-what-default run
+} else {
+    set dg-do-what-default assemble
+}
 
 set saved-lto_torture_options ${LTO_TORTURE_OPTIONS}
 set LTO_TORTURE_OPTIONS ""

diff --git a/gcc/testsuite/gcc.target/arm/cmse/struct-1.c b/gcc/testsuite/gcc.target/arm/cmse/struct-1.c
index 7555643..75a99f4 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/cmse/struct-1.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/struct-1.c
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* This test is executed only if the execution engine supports CMSE instructions.  */
 /* { dg-options "--save-temps -mcmse -Wl,--section-start,.gnu.sgstubs=0x00400000" } */
 
 typedef struct

diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index ad32310..a522da3 100644 (file)
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -4861,6 +4861,21 @@ proc check_effective_target_arm_cmse_ok {} {
     } "-mcmse"];
 }
 
+# Return 1 if the target supports executing CMSE instructions, 0
+# otherwise.  Cache the result.
+
+proc check_effective_target_arm_cmse_hw { } {
+    return [check_runtime arm_cmse_hw_available {
+       int __attribute__ ((cmse_nonsecure_entry)) ns_func(void)
+       {
+           return 0;
+       }
+       int main (void)
+       {
+           return ns_func();
+       }
+    } "-mcmse -Wl,--section-start,.gnu.sgstubs=0x00400000"]
+}
 # Return 1 if the target supports executing MVE instructions, 0
 # otherwise.