drm/amd/display: Flip pending check timeout due to disabled hubp
authorAric Cyr <aric.cyr@amd.com>
Fri, 21 Aug 2020 15:26:51 +0000 (11:26 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 15 Sep 2020 21:52:41 +0000 (17:52 -0400)
[Why]
When pipe locks are being taken we wait for flip pending to clear first.
In some cases the pipe mapping is changed and the pending we're checking
for will never clear.

[How]
Don't check disabled pipes for flip pending.

Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c

index cedf359..db5615a 100644 (file)
@@ -734,6 +734,9 @@ bool hubp1_is_flip_pending(struct hubp *hubp)
        struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
        struct dc_plane_address earliest_inuse_address;
 
+       if (hubp && hubp->power_gated)
+               return false;
+
        REG_GET(DCSURF_FLIP_CONTROL,
                        SURFACE_FLIP_PENDING, &flip_pending);
 
index bb920d0..368818d 100644 (file)
@@ -908,6 +908,9 @@ bool hubp2_is_flip_pending(struct hubp *hubp)
        struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);
        struct dc_plane_address earliest_inuse_address;
 
+       if (hubp && hubp->power_gated)
+               return false;
+
        REG_GET(DCSURF_FLIP_CONTROL,
                        SURFACE_FLIP_PENDING, &flip_pending);