let VLMul = dataEMUL.value in {
def "EI" # idxEEW # "_V_" # IdxLInfo # "_" # DataLInfo :
VPseudoILoadNoMask<Vreg, IdxVreg, idxEEW, idxEMUL.value, Ordered, HasConstraint>,
- VLXSched<idxEEW, Order, DataLInfo, IdxLInfo>;
+ VLXSched<dataEEW, Order, DataLInfo, IdxLInfo>;
def "EI" # idxEEW # "_V_" # IdxLInfo # "_" # DataLInfo # "_TU":
VPseudoILoadNoMaskTU<Vreg, IdxVreg, idxEEW, idxEMUL.value, Ordered, HasConstraint>,
- VLXSched<idxEEW, Order, DataLInfo, IdxLInfo>;
+ VLXSched<dataEEW, Order, DataLInfo, IdxLInfo>;
def "EI" # idxEEW # "_V_" # IdxLInfo # "_" # DataLInfo # "_MASK" :
VPseudoILoadMask<Vreg, IdxVreg, idxEEW, idxEMUL.value, Ordered, HasConstraint>,
RISCVMaskedPseudo</*MaskOpIdx*/ 3>,
- VLXSched<idxEEW, Order, DataLInfo, IdxLInfo>;
+ VLXSched<dataEEW, Order, DataLInfo, IdxLInfo>;
}
}
}
let VLMul = dataEMUL.value in {
def "EI" # idxEEW # "_V_" # IdxLInfo # "_" # DataLInfo :
VPseudoIStoreNoMask<Vreg, IdxVreg, idxEEW, idxEMUL.value, Ordered>,
- VSXSched<idxEEW, Order, DataLInfo, IdxLInfo>;
+ VSXSched<dataEEW, Order, DataLInfo, IdxLInfo>;
def "EI" # idxEEW # "_V_" # IdxLInfo # "_" # DataLInfo # "_MASK" :
VPseudoIStoreMask<Vreg, IdxVreg, idxEEW, idxEMUL.value, Ordered>,
- VSXSched<idxEEW, Order, DataLInfo, IdxLInfo>;
+ VSXSched<dataEEW, Order, DataLInfo, IdxLInfo>;
}
}
}
def nf # "EI" # idxEEW # "_V_" # IdxLInfo # "_" # DataLInfo :
VPseudoISegLoadNoMask<Vreg, IdxVreg, idxEEW, idxEMUL.value,
nf, Ordered>,
- VLXSEGSched<nf, idxEEW, Order, DataLInfo>;
+ VLXSEGSched<nf, dataEEW, Order, DataLInfo>;
def nf # "EI" # idxEEW # "_V_" # IdxLInfo # "_" # DataLInfo # "_TU" :
VPseudoISegLoadNoMaskTU<Vreg, IdxVreg, idxEEW, idxEMUL.value,
nf, Ordered>,
- VLXSEGSched<nf, idxEEW, Order, DataLInfo>;
+ VLXSEGSched<nf, dataEEW, Order, DataLInfo>;
def nf # "EI" # idxEEW # "_V_" # IdxLInfo # "_" # DataLInfo # "_MASK" :
VPseudoISegLoadMask<Vreg, IdxVreg, idxEEW, idxEMUL.value,
nf, Ordered>,
- VLXSEGSched<nf, idxEEW, Order, DataLInfo>;
+ VLXSEGSched<nf, dataEEW, Order, DataLInfo>;
}
}
}