idle: power: tl1 need support CPU idle [1/1]

PD#SWPL-3525

Problem:
tl1 need support cpu idle.

Solution:
tl1 enable cpu idle.

Verify:
T962x2 x301

Change-Id: I14179975bbc1856418abbf32bccbfbf8d8462e4f
Signed-off-by: Yan Wang <yan.wang@amlogic.com>

diff --git a/arch/arm/boot/dts/amlogic/mesontl1.dtsi b/arch/arm/boot/dts/amlogic/mesontl1.dtsi
index ee98d4f..3a76a4c 100644 (file)
--- a/arch/arm/boot/dts/amlogic/mesontl1.dtsi
+++ b/arch/arm/boot/dts/amlogic/mesontl1.dtsi
@@ -53,6 +53,7 @@
                                "dsu_pre_parent";
                        operating-points-v2 = <&cpu_opp_table0>;
                        cpu-supply = <&vddcpu0>;
+                       cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;
                        //cpu-idle-states = <&SYSTEM_SLEEP_0>;
                        voltage-tolerance = <0>;
                        clock-latency = <50000>;
@@ -76,6 +77,7 @@
                                "dsu_pre_parent";
                        operating-points-v2 = <&cpu_opp_table0>;
                        cpu-supply = <&vddcpu0>;
+                       cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;
                        //cpu-idle-states = <&SYSTEM_SLEEP_0>;
                        voltage-tolerance = <0>;
                        clock-latency = <50000>;
@@ -99,6 +101,7 @@
                                "dsu_pre_parent";
                        operating-points-v2 = <&cpu_opp_table0>;
                        cpu-supply = <&vddcpu0>;
+                       cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;
                        //cpu-idle-states = <&SYSTEM_SLEEP_0>;
                        voltage-tolerance = <0>;
                        clock-latency = <50000>;
@@ -122,10 +125,31 @@
                                "dsu_pre_parent";
                        operating-points-v2 = <&cpu_opp_table0>;
                        cpu-supply = <&vddcpu0>;
+                       cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;
                        //cpu-idle-states = <&SYSTEM_SLEEP_0>;
                        voltage-tolerance = <0>;
                        clock-latency = <50000>;
                };
+
+               idle-states {
+                       entry-method = "arm,psci";
+                       CPU_SLEEP_0: cpu-sleep-0 {
+                               compatible = "arm,idle-state";
+                               arm,psci-suspend-param = <0x0010000>;
+                               local-timer-stop;
+                               entry-latency-us = <4000>;
+                               exit-latency-us = <4000>;
+                               min-residency-us = <9000>;
+                       };
+                       SYSTEM_SLEEP_0: system-sleep-0 {
+                               compatible = "arm,idle-state";
+                               arm,psci-suspend-param = <0x0020000>;
+                               local-timer-stop;
+                               entry-latency-us = <0x3fffffff>;
+                               exit-latency-us = <0x40000000>;
+                               min-residency-us = <0xffffffff>;
+                       };
+               };
        };
 
        timer {

diff --git a/arch/arm64/boot/dts/amlogic/mesontl1.dtsi b/arch/arm64/boot/dts/amlogic/mesontl1.dtsi
index 87422e0..eb006f2 100644 (file)
--- a/arch/arm64/boot/dts/amlogic/mesontl1.dtsi
+++ b/arch/arm64/boot/dts/amlogic/mesontl1.dtsi
@@ -53,6 +53,7 @@
                                "dsu_pre_parent";
                        operating-points-v2 = <&cpu_opp_table0>;
                        cpu-supply = <&vddcpu0>;
+                       cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;
                        //cpu-idle-states = <&SYSTEM_SLEEP_0>;
                        voltage-tolerance = <0>;
                        clock-latency = <50000>;
@@ -76,6 +77,7 @@
                                "dsu_pre_parent";
                        operating-points-v2 = <&cpu_opp_table0>;
                        cpu-supply = <&vddcpu0>;
+                       cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;
                        //cpu-idle-states = <&SYSTEM_SLEEP_0>;
                        voltage-tolerance = <0>;
                        clock-latency = <50000>;
@@ -99,6 +101,7 @@
                                "dsu_pre_parent";
                        operating-points-v2 = <&cpu_opp_table0>;
                        cpu-supply = <&vddcpu0>;
+                       cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;
                        //cpu-idle-states = <&SYSTEM_SLEEP_0>;
                        voltage-tolerance = <0>;
                        clock-latency = <50000>;
@@ -122,10 +125,31 @@
                                "dsu_pre_parent";
                        operating-points-v2 = <&cpu_opp_table0>;
                        cpu-supply = <&vddcpu0>;
+                       cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;
                        //cpu-idle-states = <&SYSTEM_SLEEP_0>;
                        voltage-tolerance = <0>;
                        clock-latency = <50000>;
                };
+
+               idle-states {
+                       entry-method = "arm,psci";
+                       CPU_SLEEP_0: cpu-sleep-0 {
+                               compatible = "arm,idle-state";
+                               arm,psci-suspend-param = <0x0010000>;
+                               local-timer-stop;
+                               entry-latency-us = <4000>;
+                               exit-latency-us = <4000>;
+                               min-residency-us = <9000>;
+                       };
+                       SYSTEM_SLEEP_0: system-sleep-0 {
+                               compatible = "arm,idle-state";
+                               arm,psci-suspend-param = <0x0020000>;
+                               local-timer-stop;
+                               entry-latency-us = <0x3fffffff>;
+                               exit-latency-us = <0x40000000>;
+                               min-residency-us = <0xffffffff>;
+                       };
+               };
        };
 
        timer {