}
// ctx match, vaddr match, valid?
if (env->dmmuregs[1] == (env->dtlb_tag[i] & 0x1fff) &&
- (address & mask) == (env->dtlb_tag[i] & ~0x1fffULL) &&
+ (address & mask) == (env->dtlb_tag[i] & mask) &&
(env->dtlb_tte[i] & 0x8000000000000000ULL)) {
// access ok?
if (((env->dtlb_tte[i] & 0x4) && is_user) ||
#endif
return 1;
}
- *physical = (env->dtlb_tte[i] & mask & 0x1fffffff000ULL) +
- (address & ~mask & 0x1fffffff000ULL);
+ *physical = ((env->dtlb_tte[i] & mask) | (address & ~mask)) &
+ 0x1ffffffe000ULL;
*prot = PAGE_READ;
if (env->dtlb_tte[i] & 0x2)
*prot |= PAGE_WRITE;
}
// ctx match, vaddr match, valid?
if (env->dmmuregs[1] == (env->itlb_tag[i] & 0x1fff) &&
- (address & mask) == (env->itlb_tag[i] & ~0x1fffULL) &&
+ (address & mask) == (env->itlb_tag[i] & mask) &&
(env->itlb_tte[i] & 0x8000000000000000ULL)) {
// access ok?
if ((env->itlb_tte[i] & 0x4) && is_user) {
#endif
return 1;
}
- *physical = (env->itlb_tte[i] & mask & 0x1fffffff000ULL) +
- (address & ~mask & 0x1fffffff000ULL);
+ *physical = ((env->itlb_tte[i] & mask) | (address & ~mask)) &
+ 0x1ffffffe000ULL;
*prot = PAGE_EXEC;
return 0;
}
#ifdef DEBUG_MMU
printf("TMISS at 0x%" PRIx64 "\n", address);
#endif
- env->immuregs[6] = (address & ~0x1fffULL) | (env->dmmuregs[1] & 0x1fff);
+ env->immuregs[6] = (address & ~0x1fffULL) | (env->immuregs[1] & 0x1fff);
env->exception_index = TT_TMISS;
return 1;
}