arm64: dts: ls1028a: Add PCIe EP nodes

Add PCIe EP nodes for ls1028a to support EP mode.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index fd3f3e8..9010c53 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -637,6 +637,18 @@
                        status = "disabled";
                };
 
+               pcie_ep1: pcie-ep@3400000 {
+                       compatible = "fsl,ls1028a-pcie-ep","fsl,ls-pcie-ep";
+                       reg = <0x00 0x03400000 0x0 0x00100000
+                              0x80 0x00000000 0x8 0x00000000>;
+                       reg-names = "regs", "addr_space";
+                       interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */
+                       interrupt-names = "pme";
+                       num-ib-windows = <6>;
+                       num-ob-windows = <8>;
+                       status = "disabled";
+               };
+
                pcie2: pcie@3500000 {
                        compatible = "fsl,ls1028a-pcie";
                        reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */
@@ -664,6 +676,18 @@
                        status = "disabled";
                };
 
+               pcie_ep2: pcie-ep@3500000 {
+                       compatible = "fsl,ls1028a-pcie-ep","fsl,ls-pcie-ep";
+                       reg = <0x00 0x03500000 0x0 0x00100000
+                              0x88 0x00000000 0x8 0x00000000>;
+                       reg-names = "regs", "addr_space";
+                       interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */
+                       interrupt-names = "pme";
+                       num-ib-windows = <6>;
+                       num-ob-windows = <8>;
+                       status = "disabled";
+               };
+
                smmu: iommu@5000000 {
                        compatible = "arm,mmu-500";
                        reg = <0 0x5000000 0 0x800000>;