anv: Don't use REQUIRE_8 for Bindless Shaders

In 23c7142cd67 ("anv: disable SIMD16 for RT shaders") we were forcing the SIMD8
using the mechanism for subgroup size control, which is problematic since it has
other effects on the shader behavior.

The code was changed to select the SIMD in a different way in the previous patches,
so we can revert the behavior to the original semantics.

Fixes dEQP-VK.subgroups.builtin_var.ray_tracing.subgroupsize.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19601>

diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 56b5b9c..72806ca 100644 (file)
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -2776,8 +2776,6 @@ anv_pipeline_compile_ray_tracing(struct anv_ray_tracing_pipeline *pipeline,
          return vk_error(pipeline, VK_ERROR_OUT_OF_HOST_MEMORY);
       }
 
-      stages[i].nir->info.subgroup_size = SUBGROUP_SIZE_REQUIRE_8;
-
       anv_pipeline_lower_nir(&pipeline->base, pipeline_ctx, &stages[i],
                              layout, false /* use_primitive_replication */);
 
@@ -3019,8 +3017,6 @@ anv_device_init_rt_shaders(struct anv_device *device)
       nir_shader *trivial_return_nir =
          brw_nir_create_trivial_return_shader(device->physical->compiler, tmp_ctx);
 
-      trivial_return_nir->info.subgroup_size = SUBGROUP_SIZE_REQUIRE_8;
-
       NIR_PASS_V(trivial_return_nir, brw_nir_lower_rt_intrinsics, device->info);
 
       struct anv_push_descriptor_info push_desc_info = {};