staging: r8188eu: remove path parameter from rtl8188e_PHY_SetRFReg

All callers of rtl8188e_PHY_SetRFReg set the eRFPath parameter
to RF_PATH_A. Remove the parameter and use RF_PATH_A directly.

Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Link: https://lore.kernel.org/r/20220212161737.381841-4-martin@kaiser.cx
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c b/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c
index 8edae48..c7aed5e 100644 (file)
--- a/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c
+++ b/drivers/staging/r8188eu/hal/HalPhyRf_8188e.c
@@ -327,14 +327,14 @@ phy_PathA_RxIQK(struct adapter *adapt)
        /* 1 Get TXIMR setting */
        /* modify RXIQK mode table */
        rtl8188e_PHY_SetBBReg(adapt, rFPGA0_IQK, bMaskDWord, 0x00000000);
-       rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0);
-       rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000);
-       rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f);
-       rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf117B);
+       rtl8188e_PHY_SetRFReg(adapt, RF_WE_LUT, bRFRegOffsetMask, 0x800a0);
+       rtl8188e_PHY_SetRFReg(adapt, RF_RCK_OS, bRFRegOffsetMask, 0x30000);
+       rtl8188e_PHY_SetRFReg(adapt, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f);
+       rtl8188e_PHY_SetRFReg(adapt, RF_TXPA_G2, bRFRegOffsetMask, 0xf117B);
 
        /* PA,PAD off */
-       rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x980);
-       rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, 0x56, bRFRegOffsetMask, 0x51000);
+       rtl8188e_PHY_SetRFReg(adapt, 0xdf, bRFRegOffsetMask, 0x980);
+       rtl8188e_PHY_SetRFReg(adapt, 0x56, bRFRegOffsetMask, 0x51000);
 
        rtl8188e_PHY_SetBBReg(adapt, rFPGA0_IQK, bMaskDWord, 0x80800000);
 
@@ -376,10 +376,10 @@ phy_PathA_RxIQK(struct adapter *adapt)
        /* 1 RX IQK */
        /* modify RXIQK mode table */
        rtl8188e_PHY_SetBBReg(adapt, rFPGA0_IQK, bMaskDWord, 0x00000000);
-       rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0);
-       rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000);
-       rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f);
-       rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7ffa);
+       rtl8188e_PHY_SetRFReg(adapt, RF_WE_LUT, bRFRegOffsetMask, 0x800a0);
+       rtl8188e_PHY_SetRFReg(adapt, RF_RCK_OS, bRFRegOffsetMask, 0x30000);
+       rtl8188e_PHY_SetRFReg(adapt, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f);
+       rtl8188e_PHY_SetRFReg(adapt, RF_TXPA_G2, bRFRegOffsetMask, 0xf7ffa);
        rtl8188e_PHY_SetBBReg(adapt, rFPGA0_IQK, bMaskDWord, 0x80800000);
 
        /* IQK setting */
@@ -410,7 +410,7 @@ phy_PathA_RxIQK(struct adapter *adapt)
 
        /* reload RF 0xdf */
        rtl8188e_PHY_SetBBReg(adapt, rFPGA0_IQK, bMaskDWord, 0x00000000);
-       rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x180);
+       rtl8188e_PHY_SetRFReg(adapt, 0xdf, bRFRegOffsetMask, 0x180);
 
        if (!(regeac & BIT(27)) &&              /* if Tx is OK, check whether Rx is OK */
            (((regEA4 & 0x03FF0000) >> 16) != 0x132) &&
@@ -763,14 +763,14 @@ static void phy_LCCalibrate_8188E(struct adapter *adapt)
 
                /* 2. Set RF mode = standby mode */
                /* Path-A */
-               rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_AC, bMask12Bits, (RF_Amode & 0x8FFFF) | 0x10000);
+               rtl8188e_PHY_SetRFReg(adapt, RF_AC, bMask12Bits, (RF_Amode & 0x8FFFF) | 0x10000);
        }
 
        /* 3. Read RF reg18 */
        LC_Cal = rtl8188e_PHY_QueryRFReg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits);
 
        /* 4. Set LC calibration begin  bit15 */
-       rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal | 0x08000);
+       rtl8188e_PHY_SetRFReg(adapt, RF_CHNLBW, bMask12Bits, LC_Cal | 0x08000);
 
        msleep(100);
 
@@ -779,7 +779,7 @@ static void phy_LCCalibrate_8188E(struct adapter *adapt)
                /* Deal with continuous TX case */
                /* Path-A */
                rtw_write8(adapt, 0xd03, tmpreg);
-               rtl8188e_PHY_SetRFReg(adapt, RF_PATH_A, RF_AC, bMask12Bits, RF_Amode);
+               rtl8188e_PHY_SetRFReg(adapt, RF_AC, bMask12Bits, RF_Amode);
        } else {
                /*  Deal with Packet TX case */
                rtw_write8(adapt, REG_TXPAUSE, 0x00);

diff --git a/drivers/staging/r8188eu/hal/odm.c b/drivers/staging/r8188eu/hal/odm.c
index a759c2f..b4be706 100644 (file)
--- a/drivers/staging/r8188eu/hal/odm.c
+++ b/drivers/staging/r8188eu/hal/odm.c
@@ -896,7 +896,7 @@ void ODM_TXPowerTrackingCheck(struct odm_dm_struct *pDM_Odm)
        struct adapter *Adapter = pDM_Odm->Adapter;
 
        if (!pDM_Odm->RFCalibrateInfo.TM_Trigger) {             /* at least delay 1 sec */
-               rtl8188e_PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER_88E, BIT(17) | BIT(16), 0x03);
+               rtl8188e_PHY_SetRFReg(Adapter, RF_T_METER_88E, BIT(17) | BIT(16), 0x03);
 
                pDM_Odm->RFCalibrateInfo.TM_Trigger = 1;
                return;

diff --git a/drivers/staging/r8188eu/hal/odm_RegConfig8188E.c b/drivers/staging/r8188eu/hal/odm_RegConfig8188E.c
index 9059f25..0fa17a9 100644 (file)
--- a/drivers/staging/r8188eu/hal/odm_RegConfig8188E.c
+++ b/drivers/staging/r8188eu/hal/odm_RegConfig8188E.c
@@ -19,7 +19,7 @@ static void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr,
        } else if (Addr == 0xf9) {
                udelay(1);
        } else {
-               rtl8188e_PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RegAddr, bRFRegOffsetMask, Data);
+               rtl8188e_PHY_SetRFReg(pDM_Odm->Adapter, RegAddr, bRFRegOffsetMask, Data);
                /*  Add 1us delay between BB/RF register setting. */
                udelay(1);
        }

diff --git a/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c b/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
index cd82452..628cec4 100644 (file)
--- a/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
@@ -282,7 +282,6 @@ u32 rtl8188e_PHY_QueryRFReg(struct adapter *Adapter, enum rf_radio_path eRFPath,
 *
 * Input:
 *                      struct adapter *Adapter,
-*                      enum rf_radio_path eRFPath,     Radio path of A/B/C/D
 *                      u32                     RegAddr,        The target address to be modified
 *                      u32                     BitMask         The target bit position in the target address
 *                                                                      to be modified
@@ -296,7 +295,6 @@ u32 rtl8188e_PHY_QueryRFReg(struct adapter *Adapter, enum rf_radio_path eRFPath,
 void
 rtl8188e_PHY_SetRFReg(
                struct adapter *Adapter,
-               enum rf_radio_path eRFPath,
                u32 RegAddr,
                u32 BitMask,
                u32 Data
@@ -306,12 +304,12 @@ rtl8188e_PHY_SetRFReg(
 
        /*  RF data is 12 bits only */
        if (BitMask != bRFRegOffsetMask) {
-               Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr);
+               Original_Value = phy_RFSerialRead(Adapter, RF_PATH_A, RegAddr);
                BitShift =  phy_CalculateBitShift(BitMask);
                Data = ((Original_Value & (~BitMask)) | (Data << BitShift));
        }
 
-       phy_RFSerialWrite(Adapter, eRFPath, RegAddr, Data);
+       phy_RFSerialWrite(Adapter, RF_PATH_A, RegAddr, Data);
 }
 
 /*  */
@@ -725,7 +723,7 @@ static void _PHY_SwChnl8192C(struct adapter *Adapter, u8 channel)
        param1 = RF_CHNLBW;
        param2 = channel;
        pHalData->RfRegChnlVal = ((pHalData->RfRegChnlVal & 0xfffffc00) | param2);
-       rtl8188e_PHY_SetRFReg(Adapter, RF_PATH_A, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal);
+       rtl8188e_PHY_SetRFReg(Adapter, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal);
 }
 
 void PHY_SwChnl8188E(struct adapter *Adapter, u8 channel)

diff --git a/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c b/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c
index 2d5d04b..4a7a877 100644 (file)
--- a/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c
+++ b/drivers/staging/r8188eu/hal/rtl8188e_rf6052.c
@@ -51,11 +51,11 @@ void rtl8188e_PHY_RF6052SetBandwidth(struct adapter *Adapter,
        switch (Bandwidth) {
        case HT_CHANNEL_WIDTH_20:
                pHalData->RfRegChnlVal = ((pHalData->RfRegChnlVal & 0xfffff3ff) | BIT(10) | BIT(11));
-               rtl8188e_PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal);
+               rtl8188e_PHY_SetRFReg(Adapter, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal);
                break;
        case HT_CHANNEL_WIDTH_40:
                pHalData->RfRegChnlVal = ((pHalData->RfRegChnlVal & 0xfffff3ff) | BIT(10));
-               rtl8188e_PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal);
+               rtl8188e_PHY_SetRFReg(Adapter, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal);
                break;
        default:
                break;

diff --git a/drivers/staging/r8188eu/include/Hal8188EPhyCfg.h b/drivers/staging/r8188eu/include/Hal8188EPhyCfg.h
index 2517a08..e0dff77 100644 (file)
--- a/drivers/staging/r8188eu/include/Hal8188EPhyCfg.h
+++ b/drivers/staging/r8188eu/include/Hal8188EPhyCfg.h
@@ -75,8 +75,7 @@ void rtl8188e_PHY_SetBBReg(struct adapter *Adapter, u32 RegAddr,
                           u32 mask, u32 data);
 u32 rtl8188e_PHY_QueryRFReg(struct adapter *adapter, enum rf_radio_path rfpath,
                            u32 regaddr, u32 mask);
-void rtl8188e_PHY_SetRFReg(struct adapter *adapter, enum rf_radio_path rfpath,
-                          u32 regaddr, u32 mask, u32 data);
+void rtl8188e_PHY_SetRFReg(struct adapter *adapter, u32 regaddr, u32 mask, u32 data);
 
 /*  Initialization related function */
 /* MAC/BB/RF HAL config */

diff --git a/drivers/staging/r8188eu/os_dep/ioctl_linux.c b/drivers/staging/r8188eu/os_dep/ioctl_linux.c
index 9d3488c..548ed6f 100644 (file)
--- a/drivers/staging/r8188eu/os_dep/ioctl_linux.c
+++ b/drivers/staging/r8188eu/os_dep/ioctl_linux.c
@@ -2088,7 +2088,7 @@ static int rtw_wx_write_rf(struct net_device *dev,
 
        addr = *((u32 *)extra + 1);
        data32 = *((u32 *)extra + 2);
-       rtl8188e_PHY_SetRFReg(padapter, RF_PATH_A, addr, 0xFFFFF, data32);
+       rtl8188e_PHY_SetRFReg(padapter, addr, 0xFFFFF, data32);
 
        return 0;
 }
@@ -3625,7 +3625,7 @@ static int rtw_dbg_port(struct net_device *dev,
                        ret = -EINVAL;
                        break;
                }
-               rtl8188e_PHY_SetRFReg(padapter, RF_PATH_A, arg, 0xffffffff, extra_arg);
+               rtl8188e_PHY_SetRFReg(padapter, arg, 0xffffffff, extra_arg);
                DBG_88E("write RF_reg path(0x%02x), offset(0x%x), value(0x%08x)\n", minor_cmd, arg, rtl8188e_PHY_QueryRFReg(padapter, minor_cmd, arg, 0xffffffff));
                break;