pan/midgard: Add a dummy source for loads
authorAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Sat, 26 Oct 2019 19:50:38 +0000 (15:50 -0400)
committerAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fri, 1 Nov 2019 01:01:47 +0000 (01:01 +0000)
We want symmetry between loads and stores, so we add a dummy source. So
we get, e.g.

   st_int4 _,    val, arg_1, arg_2
   ld_int4 dest,   _, arg_1, arg_2

Semantically, this dummy source represents the data itself, as if the
load is simply a move. That means it has a swizzle that acts as a
source.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
src/panfrost/midgard/midgard_compile.c
src/panfrost/midgard/midgard_ra.c
src/panfrost/midgard/mir.c

index d73d600..73a905f 100644 (file)
@@ -1125,7 +1125,7 @@ emit_ubo_read(
         ins.mask = mir_mask_for_intr(instr, true);
 
         if (indirect_offset) {
-                ins.src[1] = nir_src_index(ctx, indirect_offset);
+                ins.src[2] = nir_src_index(ctx, indirect_offset);
                 ins.load_store.arg_2 = 0x80;
         } else {
                 ins.load_store.arg_2 = 0x1E;
@@ -1163,16 +1163,9 @@ emit_ssbo_access(
         unsigned addr = make_compiler_temp(ctx);
         emit_sysval_read(ctx, instr, addr, 2);
 
-        /* The source array is a bit of a leaky abstraction for SSBOs.
-         * Nevertheless, for loads:
+        /* The source array:
          *
-         *  src[0] = arg_1
-         *  src[1] = arg_2
-         *  src[2] = unused
-         *
-         * Whereas for stores:
-         *
-         *  src[0] = value
+         *  src[0] = store ? value : unused
          *  src[1] = arg_1
          *  src[2] = arg_2
          *
@@ -1180,7 +1173,7 @@ emit_ssbo_access(
          * arg_2 = the offset.
          */
 
-        ins.src[is_read ? 0 : 1] = addr;
+        ins.src[1] = addr;
 
         /* TODO: What is this? It looks superficially like a shift << 5, but
          * arg_1 doesn't take a shift Should it be E0 or A0? We also need the
@@ -1188,7 +1181,7 @@ emit_ssbo_access(
 
         if (indirect_offset) {
                 ins.load_store.arg_1 |= 0xE0;
-                ins.src[is_read ? 1 : 2] = nir_src_index(ctx, indirect_offset);
+                ins.src[2] = nir_src_index(ctx, indirect_offset);
         } else {
                 ins.load_store.arg_2 = 0x7E;
         }
@@ -1229,7 +1222,7 @@ emit_varying_read(
         ins.load_store.varying_parameters = u;
 
         if (indirect_offset)
-                ins.src[1] = nir_src_index(ctx, indirect_offset);
+                ins.src[2] = nir_src_index(ctx, indirect_offset);
         else
                 ins.load_store.arg_2 = 0x1E;
 
@@ -1715,7 +1708,7 @@ emit_texop_native(compiler_context *ctx, nir_tex_instr *instr,
 
                                 unsigned temp = make_compiler_temp(ctx);
                                 midgard_instruction ld = m_ld_cubemap_coords(temp, 0);
-                                ld.src[0] = index;
+                                ld.src[1] = index;
                                 ld.mask = 0x3; /* xy */
                                 ld.load_store.arg_1 = 0x20;
                                 ld.load_store.swizzle = alu_src.swizzle;
index 224970b..3c7be0d 100644 (file)
@@ -744,21 +744,18 @@ install_registers_instr(
 
                 /* We also follow up by actual arguments */
 
-                unsigned src2_idx = encodes_src ? 1 : 0;
-                unsigned src3_idx = encodes_src ? 2 : 1;
-
-                unsigned src2 = ins->src[src2_idx];
-                unsigned src3 = ins->src[src3_idx];
+                unsigned src2 = ins->src[1];
+                unsigned src3 = ins->src[2];
 
                 if (src2 != ~0) {
-                        struct phys_reg src = index_to_reg(ctx, g, src2, mir_srcsize(ins, src2_idx));
+                        struct phys_reg src = index_to_reg(ctx, g, src2, mir_srcsize(ins, 1));
                         unsigned component = src.offset / src.size;
                         assert(component * src.size == src.offset);
                         ins->load_store.arg_1 |= midgard_ldst_reg(src.reg, component);
                 }
 
                 if (src3 != ~0) {
-                        struct phys_reg src = index_to_reg(ctx, g, src3, mir_srcsize(ins, src3_idx));
+                        struct phys_reg src = index_to_reg(ctx, g, src3, mir_srcsize(ins, 2));
                         unsigned component = src.offset / src.size;
                         assert(component * src.size == src.offset);
                         ins->load_store.arg_2 |= midgard_ldst_reg(src.reg, component);
index fbb0120..c5b7280 100644 (file)
@@ -54,10 +54,6 @@ mir_get_swizzle(midgard_instruction *ins, unsigned idx)
 
                 return (mir_get_alu_src(ins, idx)).swizzle;
         } else if (ins->type == TAG_LOAD_STORE_4) {
-                /* Main swizzle of a load is on the destination */
-                if (!OP_IS_STORE(ins->load_store.op))
-                        idx++;
-
                 switch (idx) {
                 case 0:
                         return ins->load_store.swizzle;
@@ -131,10 +127,6 @@ mir_set_swizzle(midgard_instruction *ins, unsigned idx, unsigned new)
                 else
                         ins->alu.src2 = pack;
         } else if (ins->type == TAG_LOAD_STORE_4) {
-                /* Main swizzle of a load is on the destination */
-                if (!OP_IS_STORE(ins->load_store.op))
-                        idx++;
-
                 switch (idx) {
                 case 0:
                         ins->load_store.swizzle = new;