* gdbarch.sh (register_sim_regno): Add gdbarch as parameter.
* gdbarch.{c,h}: Regenerate.
* arch-utils.h (legacy_register_sim_regno): Add gdbarch as parameter.
* score-tdep.c (score_register_sim_regno): Likewise.
* sim-regno.h (one2one_register_sim_regno): Likewise.
* arch-utils.c (legacy_register_sim_regno): Add gdbarch as parameter.
Replace current_gdbarch by gdbarch.
* sh-tdep.c (sh_sh2a_register_sim_regno)
(sh_dsp_register_sim_regno): Likewise.
* rs6000-tdep.c (rs6000_register_sim_regno): Likewise.
* mips-tdep.c (mips_register_sim_regno): Likewise.
* m32c-tdep.c (m32c_register_sim_regno): Likewise.
* frv-tdep.c (frv_register_sim_regno): Likewise.
* arm-tdep.c (arm_register_sim_regno): Likewise.
* remote-sim.c (one2one_register_sim_regno): Likewise.
+2007-11-19 Markus Deuling <deuling@de.ibm.com>
+
+ * gdbarch.sh (register_sim_regno): Add gdbarch as parameter.
+ * gdbarch.{c,h}: Regenerate.
+
+ * arch-utils.h (legacy_register_sim_regno): Add gdbarch as parameter.
+ * score-tdep.c (score_register_sim_regno): Likewise.
+ * sim-regno.h (one2one_register_sim_regno): Likewise.
+
+ * arch-utils.c (legacy_register_sim_regno): Add gdbarch as parameter.
+ Replace current_gdbarch by gdbarch.
+ * sh-tdep.c (sh_sh2a_register_sim_regno)
+ (sh_dsp_register_sim_regno): Likewise.
+ * rs6000-tdep.c (rs6000_register_sim_regno): Likewise.
+ * mips-tdep.c (mips_register_sim_regno): Likewise.
+ * m32c-tdep.c (m32c_register_sim_regno): Likewise.
+ * frv-tdep.c (frv_register_sim_regno): Likewise.
+ * arm-tdep.c (arm_register_sim_regno): Likewise.
+ * remote-sim.c (one2one_register_sim_regno): Likewise.
+
2007-11-16 Ulrich Weigand <uweigand@de.ibm.com>
* configure.ac (--enable-targets): New configure option.
int
-legacy_register_sim_regno (int regnum)
+legacy_register_sim_regno (struct gdbarch *gdbarch, int regnum)
{
/* Only makes sense to supply raw registers. */
- gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (current_gdbarch));
+ gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch));
/* NOTE: cagney/2002-05-13: The old code did it this way and it is
suspected that some GDB/SIM combinations may rely on this
behavour. The default should be one2one_register_sim_regno
(below). */
- if (gdbarch_register_name (current_gdbarch, regnum) != NULL
- && gdbarch_register_name (current_gdbarch, regnum)[0] != '\0')
+ if (gdbarch_register_name (gdbarch, regnum) != NULL
+ && gdbarch_register_name (gdbarch, regnum)[0] != '\0')
return regnum;
else
return LEGACY_SIM_REGNO_IGNORE;
(LEGACY_SIM_REGNO_IGNORE) when the register doesn't have a valid
name. */
-extern int legacy_register_sim_regno (int regnum);
+extern int legacy_register_sim_regno (struct gdbarch *gdbarch, int regnum);
/* Return the selected byte order, or BFD_ENDIAN_UNKNOWN if no byte
order was explicitly selected. */
/* Map GDB internal REGNUM onto the Arm simulator register numbers. */
static int
-arm_register_sim_regno (int regnum)
+arm_register_sim_regno (struct gdbarch *gdbarch, int regnum)
{
int reg = regnum;
- gdb_assert (reg >= 0 && reg < gdbarch_num_regs (current_gdbarch));
+ gdb_assert (reg >= 0 && reg < gdbarch_num_regs (gdbarch));
if (regnum >= ARM_WR0_REGNUM && regnum <= ARM_WR15_REGNUM)
return regnum - ARM_WR0_REGNUM + SIM_ARM_IWMMXT_COP0R0_REGNUM;
}
static int
-frv_register_sim_regno (int reg)
+frv_register_sim_regno (struct gdbarch *gdbarch, int reg)
{
static const int spr_map[] =
{
H_SPR_FNER1, /* fner1_regnum */
};
- gdb_assert (reg >= 0 && reg < gdbarch_num_regs (current_gdbarch));
+ gdb_assert (reg >= 0 && reg < gdbarch_num_regs (gdbarch));
if (first_gpr_regnum <= reg && reg <= last_gpr_regnum)
return reg - first_gpr_regnum + SIM_FRV_GR0_REGNUM;
default_print_registers_info, /* print_registers_info */
0, /* print_float_info */
0, /* print_vector_info */
- 0, /* register_sim_regno */
+ legacy_register_sim_regno, /* register_sim_regno */
cannot_register_not, /* cannot_fetch_register */
cannot_register_not, /* cannot_store_register */
0, /* get_longjmp_target */
gdb_assert (gdbarch->register_sim_regno != NULL);
if (gdbarch_debug >= 2)
fprintf_unfiltered (gdb_stdlog, "gdbarch_register_sim_regno called\n");
- return gdbarch->register_sim_regno (reg_nr);
+ return gdbarch->register_sim_regno (gdbarch, reg_nr);
}
void
/* MAP a GDB RAW register number onto a simulator register number. See
also include/...-sim.h. */
-typedef int (gdbarch_register_sim_regno_ftype) (int reg_nr);
+typedef int (gdbarch_register_sim_regno_ftype) (struct gdbarch *gdbarch, int reg_nr);
extern int gdbarch_register_sim_regno (struct gdbarch *gdbarch, int reg_nr);
extern void set_gdbarch_register_sim_regno (struct gdbarch *gdbarch, gdbarch_register_sim_regno_ftype *register_sim_regno);
M:void:print_vector_info:struct ui_file *file, struct frame_info *frame, const char *args:file, frame, args
# MAP a GDB RAW register number onto a simulator register number. See
# also include/...-sim.h.
-f:int:register_sim_regno:int reg_nr:reg_nr::legacy_register_sim_regno::0
+m:int:register_sim_regno:int reg_nr:reg_nr::legacy_register_sim_regno::0
m:int:cannot_fetch_register:int regnum:regnum::cannot_register_not::0
m:int:cannot_store_register:int regnum:regnum::cannot_register_not::0
# setjmp/longjmp support.
static int
-m32c_register_sim_regno (int reg_nr)
+m32c_register_sim_regno (struct gdbarch *gdbarch, int reg_nr)
{
- return gdbarch_tdep (current_gdbarch)->regs[reg_nr].sim_num;
+ return gdbarch_tdep (gdbarch)->regs[reg_nr].sim_num;
}
}
static int
-mips_register_sim_regno (int regnum)
+mips_register_sim_regno (struct gdbarch *gdbarch, int regnum)
{
/* Only makes sense to supply raw registers. */
- gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (current_gdbarch));
+ gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch));
/* FIXME: cagney/2002-05-13: Need to look at the pseudo register to
decide if it is valid. Should instead define a standard sim/gdb
register numbering scheme. */
- if (gdbarch_register_name (current_gdbarch,
- gdbarch_num_regs
- (current_gdbarch) + regnum) != NULL
- && gdbarch_register_name (current_gdbarch,
- gdbarch_num_regs
- (current_gdbarch) + regnum)[0] != '\0')
+ if (gdbarch_register_name (gdbarch,
+ gdbarch_num_regs (gdbarch) + regnum) != NULL
+ && gdbarch_register_name (gdbarch,
+ gdbarch_num_regs (gdbarch) + regnum)[0] != '\0')
return regnum;
else
return LEGACY_SIM_REGNO_IGNORE;
}
int
-one2one_register_sim_regno (int regnum)
+one2one_register_sim_regno (struct gdbarch *gdbarch, int regnum)
{
/* Only makes sense to supply raw registers. */
- gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (current_gdbarch));
+ gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch));
return regnum;
}
/* Given a GDB register number REG, return the corresponding SIM
register number. */
static int
-rs6000_register_sim_regno (int reg)
+rs6000_register_sim_regno (struct gdbarch *gdbarch, int reg)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
int sim_regno;
if (tdep->sim_regno == NULL)
- init_sim_regno_table (current_gdbarch);
+ init_sim_regno_table (gdbarch);
gdb_assert (0 <= reg
- && reg <= gdbarch_num_regs (current_gdbarch)
- + gdbarch_num_pseudo_regs (current_gdbarch));
+ && reg <= gdbarch_num_regs (gdbarch)
+ + gdbarch_num_pseudo_regs (gdbarch));
sim_regno = tdep->sim_regno[reg];
if (sim_regno >= 0)
}
static int
-score_register_sim_regno (int regnum)
+score_register_sim_regno (struct gdbarch *gdbarch, int regnum)
{
gdb_assert (regnum >= 0 && regnum < SCORE_NUM_REGS);
return regnum;
}
static int
-sh_dsp_register_sim_regno (int nr)
+sh_dsp_register_sim_regno (struct gdbarch *gdbarch, int nr)
{
- if (legacy_register_sim_regno (nr) < 0)
- return legacy_register_sim_regno (nr);
+ if (legacy_register_sim_regno (gdbarch, nr) < 0)
+ return legacy_register_sim_regno (gdbarch, nr);
if (nr >= DSR_REGNUM && nr <= Y1_REGNUM)
return nr - DSR_REGNUM + SIM_SH_DSR_REGNUM;
if (nr == MOD_REGNUM)
}
static int
-sh_sh2a_register_sim_regno (int nr)
+sh_sh2a_register_sim_regno (struct gdbarch *gdbarch, int nr)
{
switch (nr)
{
default:
break;
}
- return legacy_register_sim_regno (nr);
+ return legacy_register_sim_regno (gdbarch, nr);
}
/* Set up the register unwinding such that call-clobbered registers are
/* Treat all raw registers as valid. */
-extern int one2one_register_sim_regno (int regnum);
+extern int one2one_register_sim_regno (struct gdbarch *gdbarch, int regnum);
#endif