Remainder of the dri1 times.
Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL |
BUFFER_BIT_COLOR0;
- if ( R200_DEBUG & RADEON_IOCTL ) {
- if (rmesa->radeon.sarea)
- fprintf( stderr, "r200Clear %x %d\n", mask, rmesa->radeon.sarea->pfCurrentPage);
- else
- fprintf( stderr, "r200Clear %x radeon->sarea is NULL\n", mask);
- }
-
radeonFlush( ctx );
hwmask = mask & hwbits;
/* Drawable information */
unsigned int lastStamp;
- drm_radeon_sarea_t *sarea; /* Private SAREA data */
/* Mirrors of some DRI state */
struct radeon_dri_mirror dri;
#include "dri_util.h"
#include "radeon_chipset.h"
#include "radeon_reg.h"
-#include "drm_sarea.h"
#include "xmlconfig.h"
__volatile__ uint32_t *scratch;
__DRIscreen *driScreen;
- unsigned int sarea_priv_offset;
unsigned int gart_buffer_offset; /* offset in card memory space */
unsigned int gart_texture_offset; /* offset in card memory space */
unsigned int gart_base;
int num_gb_pipes;
int num_z_pipes;
- drm_radeon_sarea_t *sarea; /* Private SAREA data */
struct radeon_bo_manager *bom;
} radeonScreenRec, *radeonScreenPtr;