board: hpe: gxp: add HPE GXP soc support
authorNick Hawkins <nick.hawkins@hpe.com>
Wed, 8 Jun 2022 21:21:37 +0000 (16:21 -0500)
committerTom Rini <trini@konsulko.com>
Thu, 23 Jun 2022 01:30:05 +0000 (21:30 -0400)
Add basic support for the HPE GXP SoC. Reset the EHCI controller at
boot.

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
board/hpe/gxp/Kconfig [new file with mode: 0644]
board/hpe/gxp/Makefile [new file with mode: 0644]
board/hpe/gxp/gxp_board.c [new file with mode: 0644]

diff --git a/board/hpe/gxp/Kconfig b/board/hpe/gxp/Kconfig
new file mode 100644 (file)
index 0000000..5b154a3
--- /dev/null
@@ -0,0 +1,46 @@
+choice
+       prompt "SoC select"
+
+config TARGET_GXP
+       bool "GXP"
+       select DM
+       select SOC_GXP
+       imply CMD_DM
+
+config TARGET_GXP2
+       bool "GXP2"
+       select DM
+       select SOC_GXP
+       select GXP_ECC
+       imply CMD_DM
+
+endchoice
+
+choice
+       prompt "GXP VROM size"
+       default GXP_VROM_64MB
+       optional
+
+config GXP_VROM_64MB
+       bool "64MB"
+
+config GXP_VROM_32MB
+       bool "32MB"
+endchoice
+
+config GXP_ECC
+       bool "Enable memory ECC protected"
+       help
+         Use half of memory to enable ECC protected
+
+config SYS_BOARD
+       default "gxp"
+
+config SYS_VENDOR
+       default "hpe"
+
+config SYS_CONFIG_NAME
+       default "gxp"
+
+config SYS_TEXT_BASE
+       default 0x50000000
diff --git a/board/hpe/gxp/Makefile b/board/hpe/gxp/Makefile
new file mode 100644 (file)
index 0000000..775d6bf
--- /dev/null
@@ -0,0 +1 @@
+obj-y += gxp_board.o
diff --git a/board/hpe/gxp/gxp_board.c b/board/hpe/gxp/gxp_board.c
new file mode 100644 (file)
index 0000000..d94d9b8
--- /dev/null
@@ -0,0 +1,75 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * GXP timer driver
+ *
+ * (C) Copyright 2022 Hewlett Packard Enterprise Development LP.
+ * Author: Nick Hawkins <nick.hawkins@hpe.com>
+ * Author: Jean-Marie Verdun <verdun@hpe.com>
+ */
+
+#include <linux/sizes.h>
+#include <asm/io.h>
+#include <dm.h>
+#include <dm/uclass.h>
+#include <ram.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define ECHI_CMD 0xcefe0010
+
+int board_init(void)
+{
+       writel(0x00080002, ECHI_CMD);
+
+       return 0;
+}
+
+int dram_init(void)
+{
+       if (IS_ENABLED(CONFIG_TARGET_GXP)) {
+               if (IS_ENABLED(CONFIG_GXP_ECC)) {
+                       /* 0x0f800000 */
+                       gd->ram_size = SZ_128M + SZ_64M + SZ_32M + SZ_16M + SZ_8M;
+               } else {
+                       /* 0x1f000000 */
+                       gd->ram_size = SZ_256M + SZ_128M + SZ_64M + SZ_32M + SZ_16M;
+               }
+
+               if (IS_ENABLED(CONFIG_GXP_VROM_64MB)) {
+                       if (IS_ENABLED(CONFIG_GXP_ECC)) {
+                               /* 0x0c000000 */
+                               gd->ram_size = SZ_128M + SZ_64M;
+                       } else {
+                               /* 0x18000000 */
+                               gd->ram_size = SZ_256M + SZ_128M;
+                       }
+               }
+
+               if (IS_ENABLED(CONFIG_GXP_VROM_32MB)) {
+                       if (IS_ENABLED(CONFIG_GXP_ECC)) {
+                               /* 0x0e000000 */
+                               gd->ram_size = SZ_128M + SZ_64M + SZ_32M;
+                       } else {
+                               /* 0x1c000000 */
+                               gd->ram_size = SZ_256M + SZ_128M + SZ_64M;
+                       }
+               }
+       }
+
+       if (IS_ENABLED(CONFIG_TARGET_GXP2)) {
+               /* 0x1b200000 */
+               gd->ram_size = SZ_256M + SZ_128M + SZ_32M + SZ_16M + SZ_2M;
+               if (IS_ENABLED(CONFIG_GXP_VROM_64MB)) {
+                       /* 0x14000000 */
+                       gd->ram_size = SZ_256M + SZ_64M;
+               }
+
+               if (IS_ENABLED(CONFIG_GXP_VROM_32MB)) {
+                       /* 0x18000000 */
+                       gd->ram_size = SZ_256M + SZ_128M;
+               }
+       }
+
+       return 0;
+}
+