* mn10x00-opc.c, mn10x00-dis.c: New files for Matsushita

        MN10x00 processors.
        * disassemble (ARCH_mn10x00): Define.
        (disassembler): Handle bfd_arch_mn10x00.
        * configure.in: Recognize bfd_mn10x00_arch.
        * configure: Rebuilt.
Continue stubbing out for Matsushita work.

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 6daee26..7ffb62f 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,12 @@
+Wed Oct  2 23:28:42 1996  Jeffrey A Law  (law@cygnus.com)
+
+       * mn10x00-opc.c, mn10x00-dis.c: New files for Matsushita
+       MN10x00 processors.
+       * disassemble (ARCH_mn10x00): Define.
+       (disassembler): Handle bfd_arch_mn10x00.
+       * configure.in: Recognize bfd_mn10x00_arch.
+       * configure: Rebuilt.
+
 Tue Oct  1 10:49:11 1996  Ian Lance Taylor  <ian@cygnus.com>
 
        * i386-dis.c (op_rtn): Change to be a pointer.  Adjust uses

diff --git a/opcodes/configure b/opcodes/configure
index 2f930dc..022a048 100755 (executable)
--- a/opcodes/configure
+++ b/opcodes/configure
@@ -1030,6 +1030,7 @@ fi
 
 
 
+
 echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6
 # On Suns, sometimes $CPP names a directory.
 if test -n "$CPP" && test -d "$CPP"; then
@@ -1045,13 +1046,13 @@ else
   # On the NeXT, cc -E runs the code through the compiler's parser,
   # not just through cpp.
   cat > conftest.$ac_ext <<EOF
-#line 1049 "configure"
+#line 1050 "configure"
 #include "confdefs.h"
 #include <assert.h>
 Syntax Error
 EOF
 ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1055: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:1056: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
 ac_err=`grep -v '^ *+' conftest.out`
 if test -z "$ac_err"; then
   :
@@ -1060,13 +1061,13 @@ else
   rm -rf conftest*
   CPP="${CC-cc} -E -traditional-cpp"
   cat > conftest.$ac_ext <<EOF
-#line 1064 "configure"
+#line 1065 "configure"
 #include "confdefs.h"
 #include <assert.h>
 Syntax Error
 EOF
 ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1070: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:1071: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
 ac_err=`grep -v '^ *+' conftest.out`
 if test -z "$ac_err"; then
   :
@@ -1094,12 +1095,12 @@ if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
   cat > conftest.$ac_ext <<EOF
-#line 1098 "configure"
+#line 1099 "configure"
 #include "confdefs.h"
 #include <$ac_hdr>
 EOF
 ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1103: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:1104: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
 ac_err=`grep -v '^ *+' conftest.out`
 if test -z "$ac_err"; then
   rm -rf conftest*
@@ -1173,7 +1174,7 @@ if test x${all_targets} = xfalse ; then
        bfd_arm_arch)           ta="$ta arm-dis.o" ;;
        bfd_convex_arch)        ;;
 # start-sanitize-d10v
-       bfd_d10v_arch)          ta="$ta d10v-dis.o d10v-opc.o " ;;
+       bfd_d10v_arch)          ta="$ta d10v-dis.o d10v-opc.o" ;;
 # end-sanitize-d10v
        bfd_h8300_arch)         ta="$ta h8300-dis.o" ;;
        bfd_h8500_arch)         ta="$ta h8500-dis.o" ;;
@@ -1184,6 +1185,7 @@ if test x${all_targets} = xfalse ; then
        bfd_m68k_arch)          ta="$ta m68k-dis.o m68k-opc.o" ;;
        bfd_m88k_arch)          ta="$ta m88k-dis.o" ;;
        bfd_mips_arch)          ta="$ta mips-dis.o mips-opc.o" ;;
+       bfd_mn10x00_arch)       ta="$ta mn10x00-dis.o mn10x00-opc.o" ;;
        bfd_ns32k_arch)         ta="$ta ns32k-dis.o" ;;
        bfd_powerpc_arch)       ta="$ta ppc-dis.o ppc-opc.o" ;;
        bfd_pyramid_arch)       ;;
@@ -1192,6 +1194,9 @@ if test x${all_targets} = xfalse ; then
        bfd_sh_arch)            ta="$ta sh-dis.o" ;;
        bfd_sparc_arch)         ta="$ta sparc-dis.o sparc-opc.o" ;;
        bfd_tahoe_arch)         ;;
+# start-sanitize-v850
+       bfd_v850_arch)          ta="$ta v850-opc.o v850-dis.o" ;;
+# end-sanitize-v850
        bfd_vax_arch)           ;;
        bfd_w65_arch)           ta="$ta w65-dis.o" ;;
        bfd_we32k_arch)         ;;
@@ -1379,6 +1384,7 @@ s%@COMMON_SHLIB@%$COMMON_SHLIB%g
 s%@SHLIB_DEP@%$SHLIB_DEP%g
 s%@BFD_PICLIST@%$BFD_PICLIST%g
 s%@SHLINK@%$SHLINK%g
+s%@INSTALL_SHLIB@%$INSTALL_SHLIB%g
 s%@CPP@%$CPP%g
 s%@archdefs@%$archdefs%g
 s%@BFD_MACHINES@%$BFD_MACHINES%g

diff --git a/opcodes/configure.in b/opcodes/configure.in
index e8690d1..76c5768 100644 (file)
--- a/opcodes/configure.in
+++ b/opcodes/configure.in
@@ -111,6 +111,7 @@ AC_SUBST(COMMON_SHLIB)
 AC_SUBST(SHLIB_DEP)
 AC_SUBST(BFD_PICLIST)
 AC_SUBST(SHLINK)
+AC_SUBST(INSTALL_SHLIB)
 
 AC_CHECK_HEADERS(string.h strings.h)
 
@@ -174,6 +175,7 @@ if test x${all_targets} = xfalse ; then
        bfd_m68k_arch)          ta="$ta m68k-dis.o m68k-opc.o" ;;
        bfd_m88k_arch)          ta="$ta m88k-dis.o" ;;
        bfd_mips_arch)          ta="$ta mips-dis.o mips-opc.o" ;;
+       bfd_mn10x00_arch)       ta="$ta mn10x00-dis.o mn10x00-opc.o" ;;
        bfd_ns32k_arch)         ta="$ta ns32k-dis.o" ;;
        bfd_powerpc_arch)       ta="$ta ppc-dis.o ppc-opc.o" ;;
        bfd_pyramid_arch)       ;;
@@ -182,6 +184,9 @@ if test x${all_targets} = xfalse ; then
        bfd_sh_arch)            ta="$ta sh-dis.o" ;;
        bfd_sparc_arch)         ta="$ta sparc-dis.o sparc-opc.o" ;;
        bfd_tahoe_arch)         ;;
+# start-sanitize-v850
+       bfd_v850_arch)          ta="$ta v850-opc.o v850-dis.o" ;;
+# end-sanitize-v850
        bfd_vax_arch)           ;;
        bfd_w65_arch)           ta="$ta w65-dis.o" ;;
        bfd_we32k_arch)         ;;

diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c
index 53d753f..c5ba659 100644 (file)
--- a/opcodes/disassemble.c
+++ b/opcodes/disassemble.c
@@ -28,6 +28,9 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
 /* start-sanitize-d10v */
 #define ARCH_d10v
 /* end-sanitize-d10v */
+/* start-sanitize-v850 */
+#define ARCH_v850
+/* end-sanitize-v850 */
 #define ARCH_h8300
 #define ARCH_h8500
 #define ARCH_hppa
@@ -36,6 +39,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
 #define ARCH_m68k
 #define ARCH_m88k
 #define ARCH_mips
+#define ARCH_mn10x00
 #define ARCH_ns32k
 #define ARCH_powerpc
 #define ARCH_rs6000
@@ -64,17 +68,7 @@ disassembler (abfd)
 #endif
 #ifdef ARCH_alpha
     case bfd_arch_alpha:
-      switch (bfd_get_flavour (abfd))
-       {
-       case bfd_target_ecoff_flavour:
-       case bfd_target_elf_flavour:
-       default:
-          disassemble = print_insn_alpha_osf;
-         break;
-       case bfd_target_evax_flavour:
-         disassemble = print_insn_alpha_vms;
-         break;
-       }
+      disassemble = print_insn_alpha;
       break;
 #endif
 /* start-sanitize-arc */
@@ -155,6 +149,11 @@ disassembler (abfd)
        disassemble = print_insn_little_mips;
       break;
 #endif
+#ifdef ARCH_mn10x00
+    case bfd_arch_mn10x00:
+      disassemble = print_insn_mn10x00;
+      break;
+#endif
 #ifdef ARCH_powerpc
     case bfd_arch_powerpc:
       if (bfd_big_endian (abfd))
@@ -181,6 +180,13 @@ disassembler (abfd)
       disassemble = print_insn_sparc;
       break;
 #endif
+/* start-sanitize-v850 */
+#ifdef ARCH_v850
+    case bfd_arch_v850:
+      disassemble = print_insn_v850;
+      break;
+#endif
+/* end-sanitize-v850 */
 #ifdef ARCH_w65
     case bfd_arch_w65:
       disassemble = print_insn_w65;

diff --git a/opcodes/mn10x00-dis.c b/opcodes/mn10x00-dis.c
new file mode 100755 (executable)
index 0000000..cd068e3
--- /dev/null
+++ b/opcodes/mn10x00-dis.c
@@ -0,0 +1,34 @@
+/* Disassemble MN10x00 instructions.
+   Copyright (C) 1996 Free Software Foundation, Inc.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+
+#include <stdio.h>
+
+#include "ansidecl.h"
+#include "opcode/mn10x00.h" 
+#include "dis-asm.h"
+
+static void disassemble PARAMS ((bfd_vma memaddr,
+                                struct disassemble_info *info,
+                                unsigned long insn));
+
+int 
+print_insn_mn10x00 (memaddr, info)
+     bfd_vma memaddr;
+     struct disassemble_info *info;
+{
+}

diff --git a/opcodes/mn10x00-opc.c b/opcodes/mn10x00-opc.c
new file mode 100644 (file)
index 0000000..278756b
--- /dev/null
+++ b/opcodes/mn10x00-opc.c
@@ -0,0 +1,51 @@
+/* Assemble Matsushita MN10x00 instructions.
+   Copyright (C) 1996 Free Software Foundation, Inc.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#include "ansidecl.h"
+#include "opcode/mn10x00.h"
+
+\f
+const struct mn10x00_operand mn10x00_operands[] = {
+#define UNUSED 0
+  { 0, 0, 0 }, 
+} ; 
+
+\f
+/* The opcode table.
+
+   The format of the opcode table is:
+
+   NAME                OPCODE          MASK            { OPERANDS }
+
+   NAME is the name of the instruction.
+   OPCODE is the instruction opcode.
+   MASK is the opcode mask; this is used to tell the disassembler
+     which bits in the actual opcode must match OPCODE.
+   OPERANDS is the list of operands.
+
+   The disassembler reads the table in order and prints the first
+   instruction which matches, so this table is sorted to put more
+   specific instructions before more general instructions.  It is also
+   sorted by major opcode.  */
+
+const struct mn10x00_opcode mn10x00_opcodes[] = {
+{ 0, 0, 0, {0}, } } ;
+
+const int mn10x00_num_opcodes =
+  sizeof (mn10x00_opcodes) / sizeof (mn10x00_opcodes[0]);
+
+\f