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RDMA/hns: Fix incorrect vlan enable bit in QPC
author
Weihang Li
<liweihang@huawei.com>
Wed, 23 Jun 2021 08:50:01 +0000
(16:50 +0800)
committer
Jason Gunthorpe
<jgg@nvidia.com>
Wed, 23 Jun 2021 17:37:53 +0000
(14:37 -0300)
The QPC_RQ/SQ_VLAN_EN bit in QPC should be enabled, not the QPC mask.
Fixes:
f0cb411aad23
("RDMA/hns: Use new interface to modify QP context")
Link:
https://lore.kernel.org/r/1624438201-11915-1-git-send-email-liweihang@huawei.com
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
drivers/infiniband/hw/hns/hns_roce_hw_v2.c
patch
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diff --git
a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index
3c35ae4
..
fc985d6
100644
(file)
--- a/
drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/
drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@
-4676,9
+4676,9
@@
static int hns_roce_v2_set_path(struct ib_qp *ibqp,
/* Only HIP08 needs to set the vlan_en bits in QPC */
if (vlan_id < VLAN_N_VID &&
hr_dev->pci_dev->revision == PCI_REVISION_ID_HIP08) {
- hr_reg_enable(
qpc_mask
, QPC_RQ_VLAN_EN);
+ hr_reg_enable(
context
, QPC_RQ_VLAN_EN);
hr_reg_clear(qpc_mask, QPC_RQ_VLAN_EN);
- hr_reg_enable(
qpc_mask
, QPC_SQ_VLAN_EN);
+ hr_reg_enable(
context
, QPC_SQ_VLAN_EN);
hr_reg_clear(qpc_mask, QPC_SQ_VLAN_EN);
}